Hoang Anh Du Nguyen

Orcid: 0000-0002-4618-7371

According to our database1, Hoang Anh Du Nguyen authored at least 25 papers between 2015 and 2022.

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Bibliography

2022
APmap: An Open-Source Compiler for Automata Processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A Survey on Memory-centric Computer Architectures.
ACM J. Emerg. Technol. Comput. Syst., 2022

2020
A Classification of Memory-Centric Computing.
ACM J. Emerg. Technol. Comput. Syst., 2020

The Power of Computation-in-Memory Based on Memristive Devices.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
Enhanced Scouting Logic: A Robust Memristive Logic Design Scheme.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019

A computation-in-memory accelerator based on resistive devices.
Proceedings of the International Symposium on Memory Systems, 2019

Memristive Device Based Circuits for Computation-in-Memory Architectures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Time-division Multiplexing Automata Processor.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Applications of Computation-In-Memory Architectures based on Memristive Devices.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
A Mapping Methodology of Boolean Logic Circuits on Memristor Crossbar.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Memristive devices for computation-in-memory.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
On the Implementation of Computation-in-Memory Parallel Adder.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Memristive devices for computing: Beyond CMOS and beyond von Neumann.
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017

Scouting Logic: A Novel Memristor-Based Logic Design for Resistive Computing.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Interconnect networks for resistive computing architectures.
Proceedings of the 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2017

Memristive devices: Technology, design automation and computing frontiers.
Proceedings of the 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2017

On the robustness of memristor based logic gates.
Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

2016
Synthesizing HDL to memristor technology: A generic framework.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

Non-volatile look-up table based FPGA implementations.
Proceedings of the 11th International Design & Test Symposium, 2016

Boolean logic gate exploration for memristor crossbar.
Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016

2015
Interconnect networks for memristor crossbar.
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

Computation-in-memory based parallel adder.
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

Fast boolean logic mapped on memristor crossbar.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Accelerating complex brain-model simulations on GPU platforms.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Memristor based computation-in-memory architecture for data-intensive applications.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015


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