Alric Althoff

Orcid: 0000-0002-8355-6906

According to our database1, Alric Althoff authored at least 23 papers between 2015 and 2023.

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Bibliography

2023
Pentimento: Data Remanence in Cloud FPGAs.
CoRR, 2023

2022
Sherlock: A Multi-Objective Design Space Exploration Framework.
ACM Trans. Design Autom. Electr. Syst., 2022

2021
Special Session: CAD for Hardware Security - Automation is Key to Adoption of Solutions.
Proceedings of the 39th IEEE VLSI Test Symposium, 2021

iSTELLAR: intermittent Signature aTtenuation Embedded CRYPTO with Low-Level metAl Routing.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

A Computational Stack for Cross-Domain Acceleration.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020
A Unified Model for Gate Level Propagation Analysis.
CoRR, 2020

Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking.
CoRR, 2020

2019
Statistical Metrics of Hardware Security.
PhD thesis, 2019

Benchmarking Video with the Surgical Image Registration Generator (SIRGn) Baseline.
Proceedings of the Advances in Visual Computing, 2019

Holistic Power Side-Channel Leakage Assessment: Towards a Robust Multidimensional Metric.
Proceedings of the International Conference on Computer-Aided Design, 2019

FPGA Architectures for Real-time Dense SLAM.
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018
Synthesizable Higher-Order Functions for C++.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Quantitative Analysis of Timing Channel Security in Cryptographic Hardware Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Hiding Intermittent Information Leakage with Architectural Support for Blinking.
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018

2017
A streaming clustering approach using a heterogeneous system for big data analysis.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

An Architecture for Learning Stream Distributions with Application to RNG Testing.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
Towards Property Driven Hardware Security.
Proceedings of the 17th International Workshop on Microprocessor and SOC Test and Verification, 2016

Spector: An OpenCL FPGA benchmark suite.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

Adaptive Threshold Non-Pareto Elimination: Re-thinking machine learning for system level design space exploration on FPGAs.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Composable, parameterizable templates for high-level synthesis.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Quantifying hardware security using joint information flow analysis.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Quantifying Timing-Based Information Flow in Cryptographic Hardware.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

A scalable FPGA architecture for nonnegative least squares problems.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015


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