Dmitry Yakimets

According to our database, Dmitry Yakimets authored at least 8 papers between 2013 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7.

Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Dmitry Yakimets, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene

Proceedings of the 47th European Solid-State Device Research Conference, 2017

2016

Device/system performance modeling of stacked lateral NWFET logic.

Victor Huang, Chenyun Pan, Dmitry Yakimets, Praveen Raghavan, Azad Naeemi

Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

2015

Lateral NWFET optimization for beyond 7nm nodes.

Dmitry Yakimets, Doyoung Jang, Praveen Raghavan, Geert Eneman, Hans Mertens, P. Schuddinck, Arindam Mallik, Marie Garcia Bardon, Nadine Collaert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Kristin De Meyer

Proceedings of the 2015 International Conference on IC Design & Technology, 2015

Dimensioning for power and performance under 10nm: The limits of FinFETs scaling.

Marie Garcia Bardon, P. Schuddinck, Praveen Raghavan, Doyoung Jang, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Thean

Proceedings of the 2015 International Conference on IC Design & Technology, 2015

Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM.

Trong Huynh Bao, Sushil Sakhare, Julien Ryckaert, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Voon-Yew Thean, Piet Wambacq

Proceedings of the 2015 International Conference on IC Design & Technology, 2015

Holisitic device exploration for 7nm node.

Praveen Raghavan, Marie Garcia Bardon, Doyoung Jang, P. Schuddinck, Dmitry Yakimets, Julien Ryckaert, Abdelkarim Mercha, Naoto Horiguchi, Nadine Collaert, Anda Mocuta, Dan Mocuta, Zsolt Tokei, Diederik Verkest, Aaron Thean, An Steegen

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014

Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies.

Trong Huynh Bao, Dmitry Yakimets, Julien Ryckaert, Ivan Ciofi, Rogier Baert, Anabela Veloso, Jürgen Bömmels, Nadine Collaert, Philippe Roussel, S. Demuynck, Praveen Raghavan, Abdelkarim Mercha, Zsolt Tokei, Diederik Verkest, Aaron Thean, Piet Wambacq

Proceedings of the 44th European Solid State Device Research Conference, 2014

2013

STI and eSiGe source/drain epitaxy induced stress modeling in 28 nm technology with replacement gate (RMG) process.

Doyoung Jang, Marie Garcia Bardon, Dmitry Yakimets, Kenichi Miyaguchi, An De Keersgieter, Thomas Chiarella, Romain Ritzenthaler, Morin Dehan, Abdelkarim Mercha

Proceedings of the European Solid-State Device Research Conference, 2013