Thomas Chiarella

According to our database, Thomas Chiarella authored at least 12 papers between 2009 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

A Pragmatic Model to Predict Future Device Aging.

James Brown, Kean Hong Tok, Rui Gao, Zhigang Ji, Weidong Zhang, John S. Marsland, Thomas Chiarella, Jacopo Franco, Ben Kaczer, Dimitri Linten, Jianfu Zhang

IEEE Access, 2023

Nanosheet-based Complementary Field-Effect Transistors (CFETs) at 48nm Gate Pitch, and Middle Dielectric Isolation to enable CFET Inner Spacer Formation and Multi-Vt Patterning.

Hans Mertens, M. Hosseini, Thomas Chiarella, D. Zhou, S. Wang, G. Mannaert, E. Dupuy, D. Radisic, Z. Tao, Y. Oniki, Andriy Hikavyy, R. Rosseel, A. Mingardi, S. Choudhury, P. Puttarame Gowda, F. Sebaai, A. Peter, Kevin Vandersmissen, J. P. Soulie, An De Keersgieter, L. Petersen Barbosa Lima, C. Cavalcante, D. Batuk, G. T. Martinez, J. Geypen, F. Seidel, K. Paulussen, P. Favia, Jürgen Bömmels, Roger Loo, P. Wong, A. Sepulveda Marquez, B. T. Chan, Jérôme Mitard, S. Subramanian, S. Demuynck, E. Dentoni Litta, N. Horiguchi, S. Samavedam, S. Biesemans

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2021

Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies.

Gerhard Rzepa, Markus Karner, Oskar Baumgartner, Georg Strof, Franz Schanovsky, Ferdinand Mitterbauer, Christian Kernstock, Hui-Wen Karner, Pieter Weckx, Geert Hellings, Dieter Claes, Zhicheng Wu, Yang Xiang, Thomas Chiarella, Bertrand Parvais, Jérôme Mitard, Jacopo Franco, Ben Kaczer, Dimitri Linten, Zlatan Stanojevic

Proceedings of the IEEE International Reliability Physics Symposium, 2021

2019

CDM-Time Domain Turn-on Transient of ESD Diodes in Bulk FinFET and GAA NW Technologies.

Shih-Hung Chen, Dimitri Linten, Geert Hellings, Marko Simicic, Ben Kaczer, Thomas Chiarella, Hans Mertens, Jérôme Mitard, Anda Mocuta, N. Horiguchi

Proceedings of the IEEE International Reliability Physics Symposium, 2019

2017

On the ballistic ratio in 14nm-Node FinFETs.

F. M. Bufler, Kenichi Miyaguchi, Thomas Chiarella, N. Horiguchi, Anda Mocuta

Proceedings of the 47th European Solid-State Device Research Conference, 2017

2016

Towards high performance sub-10nm finW bulk FinFET technology.

Thomas Chiarella, Stefan Kubicek, E. Rosseel, Romain Ritzenthaler, Andriy Hikavyy, P. Eyben, An De Keersgieter, L.-Å. Ragnarsson, M.-S. Kim, S.-A. Chew, Tom Schram, S. Demuynck, Miroslav Cupák, Luc Rijnders, Morin Dehan, Naoto Horiguchi, Jérôme Mitard, Dan Mocuta, Anda Mocuta, Aaron Voon-Yew Thean

Proceedings of the 46th European Solid-State Device Research Conference, 2016

2015

Origins and implications of increased channel hot carrier variability in nFinFETs.

Ben Kaczer, Jacopo Franco, M. Cho, Tibor Grasser, Philippe J. Roussel, Stanislav Tyaginov, M. Bina, Yannick Wimmer, Luis-Miguel Procel, Lionel Trojman, Felice Crupi, Gregory Pitner, Vamsi Putcha, Pieter Weckx, Erik Bury, Z. Ji, An De Keersgieter, Thomas Chiarella, Naoto Horiguchi, Guido Groeseneken, Aaron Thean

Proceedings of the IEEE International Reliability Physics Symposium, 2015

Time dependent variability in RMG-HKMG FinFETs: Impact of extraction scheme on stochastic NBTI.

Ankush Chaudhary, Ben Kaczer, Philippe J. Roussel, Thomas Chiarella, Naoto Horiguchi, Souvik Mahapatra

Proceedings of the IEEE International Reliability Physics Symposium, 2015

Impact of fin shape variability on device performance towards 10nm node.

Kazuyuki Tomida, Keizo Hiraga, Morin Dehan, Geert Hellings, Doyoung Jang, Kenichi Miyaguchi, Thomas Chiarella, Minsoo Kim, Anda Mocuta, Naoto Horiguchi, Abdelkarim Mercha, Diederik Verkest, Aaron Thean

Proceedings of the 2015 International Conference on IC Design & Technology, 2015

2013

STI and eSiGe source/drain epitaxy induced stress modeling in 28 nm technology with replacement gate (RMG) process.

Doyoung Jang, Marie Garcia Bardon, Dmitry Yakimets, Kenichi Miyaguchi, An De Keersgieter, Thomas Chiarella, Romain Ritzenthaler, Morin Dehan, Abdelkarim Mercha

Proceedings of the European Solid-State Device Research Conference, 2013

2012

Methodology for extracting the characteristic capacitances of a power MOSFET transistor, using conventional on-wafer testing techniques.

Christoph Kerner, Ivan Ciofi, Thomas Chiarella, Stefaan Van Huylenbroeck

Proceedings of the 2012 European Solid-State Device Research Conference, 2012

2009

Migrating from planar to FinFET for further CMOS scaling: SOI or bulk?

Thomas Chiarella, Liesbeth Witters, Abdelkarim Mercha, Christoph Kerner, Rok Dittrich, Michal Rakowski, Claude Ortolland, Lars-Åke Ragnarsson, Bertrand Parvais, An De Keersgieter, Stefan Kubicek, Augusto Redolfi, R. Rooyackers, C. Vrancken, S. Brus, A. Lauwers, Philippe Absil, S. Biesemans, Thomas Y. Hoffmann

Proceedings of the 35th European Solid-State Circuits Conference, 2009