Kenichi Miyaguchi

According to our database1, Kenichi Miyaguchi authored at least 9 papers between 2013 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Backside PDN and 2.5D MIMCAP to Double Boost 2D and 3D ICs IR-Drop beyond 2nm Node.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021
110GHz Through-Silicon Via's Integrated in Silicon Photonics Interposers for Next-Generation Optical Modules.
Proceedings of the European Conference on Optical Communication, 2021

2020
Device Scaling roadmap and its implications for Logic and Analog platform.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2020

2017
On the ballistic ratio in 14nm-Node FinFETs.
Proceedings of the 47th European Solid-State Device Research Conference, 2017

2015
Comparison of NBTI aging on adder architectures and ring oscillators in the downscaling technology nodes.
Microprocess. Microsystems, 2015

Impact of fin shape variability on device performance towards 10nm node.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

Modeling FinFET metal gate stack resistance for 14nm node and beyond.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

2014

2013
STI and eSiGe source/drain epitaxy induced stress modeling in 28 nm technology with replacement gate (RMG) process.
Proceedings of the European Solid-State Device Research Conference, 2013


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