Carlos Álvarez

According to our database1, Carlos Álvarez authored at least 28 papers between 2001 and 2018.

Collaborative distances:



In proceedings 
PhD thesis 






The AXIOM platform for next-generation cyber physical systems.
Microprocessors and Microsystems - Embedded Hardware Design, 2017

Implementation of the K-Means Algorithm on Heterogeneous Devices: A Use Case Based on an Industrial Dataset.
Proceedings of the Parallel Computing is Everywhere, 2017

General Purpose Task-Dependence Management Hardware for Task-Based Dataflow Programming Models.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium, 2017

Characterizing and Improving the Performance of Many-Core Task-Based Parallel Programming Runtimes.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Picos, A Hardware Task-Dependence Manager for Task-Based Dataflow Programming Models.
Proceedings of the 2017 International Conference on High Performance Computing & Simulation, 2017

Exploiting Parallelism on GPUs and FPGAs with OmpSs.
Proceedings of the 1st Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, 2017

MInGLE: An Efficient Framework for Domain Acceleration Using Low-Power Specialized Functional Units.
TACO, 2016

The AXIOM software layers.
Microprocessors and Microsystems - Embedded Hardware Design, 2016

The Secrets of the Accelerators Unveiled: Tracing Heterogeneous Executions Through OMPT.
Proceedings of the OpenMP: Memory, Devices, and Tasks, 2016

Performance analysis of a hardware accelerator of dependence management for task-based dataflow programming models.
Proceedings of the 2016 IEEE International Symposium on Performance Analysis of Systems and Software, 2016

Picos: A hardware runtime architecture support for OmpSs.
Future Generation Comp. Syst., 2015

Coarse-Grain Performance Estimator for Heterogeneous Parallel Computing Architectures like Zynq All-Programmable SoC.
CoRR, 2015

The AXIOM project (Agile, eXtensible, fast I/O Module).
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

Automatic design of domain-specific instructions for low-power processors.
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

Hybrid Dataflow/von-Neumann Architectures.
IEEE Trans. Parallel Distrib. Syst., 2014

OmpSs@Zynq all-programmable SoC ecosystem.
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

Accelerating an application domain with specialized functional units.
TACO, 2013

Heterogeneous tasking on SMP/FPGA SoCs: The case of OmpSs and the Zynq.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Analysis of the Task Superscalar Architecture Hardware Design.
Proceedings of the International Conference on Computational Science, 2013

Dynamic Tolerance Region Computing for Multimedia.
IEEE Trans. Computers, 2012

Fuzzy Memoization for Floating-Point Multimedia Applications.
IEEE Trans. Computers, 2005

Initial Results on Fuzzy Floating Point Computation for Multimedia Processors.
Computer Architecture Letters, 2002

Cost effective memory disambiguation for multimedia codes.
Proceedings of the International Conference on Compilers, 2002

On the potential of tolerant region reuse for multimedia applications.
Proceedings of the 15th international conference on Supercomputing, 2001