Geert Hellings
Orcid: 0000-0001-6898-688XAffiliations:
- imec, Leuven, Belgium
According to our database1,
Geert Hellings
authored at least 38 papers
between 2010 and 2023.
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Bibliography
2023
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2023
PPA and Scaling Potential of Backside Power Options in N2 and A14 Nanosheet Technology.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Block-level Evaluation and Optimization of Backside PDN for High-Performance Computing at the A14 node.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Investigating Nanowire, Nanosheet and Forksheet FET Hot-Carrier Reliability via TCAD Simulations: Invited Paper.
Proceedings of the IEEE International Reliability Physics Symposium, 2023
Towards Chip-Package-System Co-optimization of Thermally-limited System-On-Chips (SOCs).
Proceedings of the IEEE International Reliability Physics Symposium, 2023
2022
Evaluation of Nanosheet and Forksheet Width Modulation for Digital IC Design in the Sub-3-nm Era.
IEEE Trans. Very Large Scale Integr. Syst., 2022
Self-Heating in iN8-iN2 CMOS Logic Cells: Thermal Impact of Architecture (FinFET, Nanosheet, Forksheet and CFET) and Scaling Boosters.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Simulation Comparison of Hot-Carrier Degradation in Nanowire, Nanosheet and Forksheet FETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2022
Proceedings of the IEEE International Reliability Physics Symposium, 2022
Co-integration Process Compatible Input/Output (I/O) Device Options for GAA Nanosheet Technology.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022
2021
Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies.
Proceedings of the IEEE International Reliability Physics Symposium, 2021
Performance Trade-Off Scenarios for GAA Nanosheet FETs Considering Inner-spacers and Epi-induced Stress: Understanding & Mitigating Process Risks.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021
2020
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
2019
Proceedings of the IEEE International Reliability Physics Symposium, 2019
Comparative Analysis of the Degradation Mechanisms in Logic and I/O FinFET Devices Induced by Plasma Damage.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
Concise Analytical Expression for Wunsch-Bell 1-D Pulsed Heating and Applications in ESD Using TLP.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
CDM-Time Domain Turn-on Transient of ESD Diodes in Bulk FinFET and GAA NW Technologies.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
Stochastic Modeling of Hot-Carrier Degradation in nFinFETs Considering the Impact of Random Traps and Random Dopants.
Proceedings of the 49th European Solid-State Device Research Conference, 2019
2018
Scalability comparison between raised- and embedded-SiGe source/drain structures for Si<sub>0.55</sub>Ge<sub>0.45</sub> implant free quantum well pFET.
Microelectron. Reliab., 2018
Microelectron. Reliab., 2018
ESD diodes with Si/SiGe superlattice I/O finFET architecture in a vertically stacked horizontal nanowire technology.
Proceedings of the 48th European Solid-State Device Research Conference, 2018
Proceedings of the 48th European Solid-State Device Research Conference, 2018
2017
Proceedings of the 47th European Solid-State Device Research Conference, 2017
Tunable ESD clamp for high-voltage power I/O pins of a battery charge circuit in mobile applications.
Proceedings of the 47th European Solid-State Device Research Conference, 2017
2016
Impact of on- and off-chip protection on the transient-induced latch-up sensitivity of CMOS IC.
Microelectron. Reliab., 2016
2015
Proceedings of the Symposium on VLSI Circuits, 2015
Proceedings of the IEEE International Reliability Physics Symposium, 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Proceedings of the 2015 International 3D Systems Integration Conference, 2015
2013
Quasi-3D method: Time-efficient TCAD and mixed-mode simulations on finFET technologies.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
2012
Superior reliability and reduced Time-Dependent variability in high-mobility SiGe channel pMOSFETs for VLSI logic applications.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012
2010
Impact of interface state trap density on the performance characteristics of different III-V MOSFET architectures.
Microelectron. Reliab., 2010