Paul R. Genssler

Orcid: 0000-0002-7175-7284

According to our database1, Paul R. Genssler authored at least 30 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 1969, "For significant contributions to the electric power industry in the fields of high-voltage transmission of dc and ac power.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
WaSSaBi: Wafer Selection With Self-Supervised Representations and Brain-Inspired Active Learning.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2024

In-Memory Acceleration of Hyperdimensional Genome Matching on Unreliable Emerging Technologies.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2024

2023
Modeling and Predicting Transistor Aging Under Workload Dependency Using Machine Learning.
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2023

HW/SW Co-Design for Reliable TCAM- Based In-Memory Brain-Inspired Hyperdimensional Computing.
IEEE Trans. Computers, August, 2023

FDSOI-Based Analog Computing for Ultra-Efficient Hamming Distance Similarity Calculation.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2023

Brain-Inspired Hyperdimensional Computing: How Thermal-Friendly for Edge Computing?
IEEE Embed. Syst. Lett., March, 2023

Frontiers in AI Acceleration: From Approximate Computing to FeFET Monolithic 3D Integration.
Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023

Stress-Resiliency of AI Implementations on FPGAs.
Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

Challenges in Machine Learning Techniques to Estimate Reliability from Transistors to Circuits.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

Learning-Oriented Reliability Improvement of Computing Systems From Transistor to Application Level.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

HDGIM: Hyperdimensional Genome Sequence Matching on Unreliable highly scaled FeFET.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Tutorial: The Synergy of Hyperdimensional and In-Memory Computing.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2023

Beyond von Neumann Era: Brain-Inspired Hyperdimensional Computing to the Rescue.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

Hyperdimensional Computing for Robust and Efficient Unsupervised Learning.
Proceedings of the 57th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2023, Pacific Grove, CA, USA, October 29, 2023

Technology/Algorithm Co-Design for Robust Brain-Inspired Hyperdimensional In-memory Computing.
Proceedings of the 57th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2023, Pacific Grove, CA, USA, October 29, 2023

2022
Software-Managed Read and Write Wear-Leveling for Non-Volatile Main Memory.
ACM Trans. Embed. Comput. Syst., 2022

On the Reliability of FeFET On-Chip Memory.
IEEE Trans. Computers, 2022

Brain-Inspired Computing for Circuit Reliability Characterization.
IEEE Trans. Computers, 2022

HW/SW Co-design for Reliable In-memory Brain-inspired Hyperdimensional Computing.
CoRR, 2022

Cross-layer FeFET Reliability Modeling for Robust Hyperdimensional Computing.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

Wafer Map Defect Classification Based on the Fusion of Pattern and Pixel Information.
Proceedings of the IEEE International Test Conference, 2022


Brain-Inspired Hyperdimensional Computing for Ultra-Efficient Edge AI.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2022

Design Close to the Edge for Advanced Technology using Machine Learning and Brain-Inspired Algorithms.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021
Brain-Inspired Computing for Wafer Map Defect Pattern Classification.
Proceedings of the IEEE International Test Conference, 2021

2020
SoftWear: Software-Only In-Memory Wear-Leveling for Non-Volatile Main Memory.
CoRR, 2020

BTI and HCD Degradation in a Complete 32 × 64 bit SRAM Array - including Sense Amplifiers and Write Drivers - under Processor Activity.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Impact of Self-Heating on Performance, Power and Reliability in FinFET Technology.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2017
A New Level of Trusted Cloud Computing - Virtualized Reconfigurable Resources in a Security-First Architecture.
Proceedings of the 47. Jahrestagung der Gesellschaft für Informatik, 2017

2016
Migration of long-running Tasks between Reconfigurable Resources using Virtualization.
SIGARCH Comput. Archit. News, 2016


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