Tommaso Marinelli
Orcid: 0000-0002-8555-3581
According to our database1,
Tommaso Marinelli
authored at least 9 papers
between 2020 and 2025.
Collaborative distances:
Collaborative distances:
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Bibliography
2025
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2025
AI Ethics, February, 2025
Proceedings of the Design, Automation & Test in Europe Conference, 2025
2024
Dynamic Segmented Bus for Energy-Efficient Last-Level Cache in Advanced Interconnect-Dominant Nodes.
IEEE Embed. Syst. Lett., December, 2024
CoRR, 2024
2023
COMPAD: A heterogeneous cache-scratchpad CPU architecture with data layout compaction for embedded loop-dominated applications.
J. Syst. Archit., December, 2023
2022
Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices.
ACM Trans. Embed. Comput. Syst., 2022
Time-Dependent Electromigration Modeling for Workload-Aware Design-Space Exploration in STT-MRAM.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
2020