Gerald Beyer

According to our database1, Gerald Beyer authored at least 15 papers between 2011 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Nano-Through Silicon Vias (nTSV) for Backside Power Delivery Networks (BSPDN).
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2022

2019
Process Complexity and Cost Considerations of Multi-Layer Die Stacks.
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019

2018
TSV process-induced MOS reliability degradation.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

2016
High-density and low-leakage novel embedded 3D MIM capacitor on Si interposer.
Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016

Extreme wafer thinning optimization for via-last applications.
Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016

Continuity and reliability assessment of a scalable 3×50μm and 2×40μm via-middle TSV module.
Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016

Die to wafer 3D stacking for below 10um pitch microbumps.
Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016

2015
Permanent wafer bonding in the low temperature by using various plasma enhanced chemical vapour deposition dielectrics.
Proceedings of the 2015 International 3D Systems Integration Conference, 2015

2014
Reliability challenges for barrier/liner system in high aspect ratio through silicon vias.
Microelectron. Reliab., 2014

2012
3D chip package interaction thermo-mechanical challenges: Proximity effects of Through Silicon vias and μ-bumps.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012

2011
Ultrathin wafer handling in 3D Stacked IC manufacturing combining a novel ZoneBOND™ temporary bonding process with room temperature peel debonding.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

Analysis of microbump induced stress effects in 3D stacked IC technologies.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

3D stacking using Cu-Cu direct bonding.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

In-line metrology and inspection for process control during 3D stacking of IC's.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011


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