Michelangelo Grosso
Orcid: 0000-0002-9726-0356
According to our database1,
Michelangelo Grosso
authored at least 65 papers
between 2005 and 2025.
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Bibliography
2025
Proceedings of the 23rd IEEE Interregional NEWCAS Conference, 2025
2024
Assessing the Effectiveness of Software-Based Self-Test Programs for Static Cell-Aware Test.
Proceedings of the IEEE European Test Symposium, 2024
Proceedings of the IEEE International Conference on Design, 2024
Proceedings of the 39th Conference on Design of Circuits and Integrated Systems, 2024
AMBEATion: Analog Mixed-Signal Back-End Design Automation with Machine Learning and Artificial Intelligence Techniques.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
2023
Targeting different defect-oriented fault models in IC testing: an experimental approach.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
2022
Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022
A comparative overview of ATPG flows targeting traditional and cell-aware fault models.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
2021
Proceedings of the 22nd IEEE Latin American Test Symposium, 2021
2020
Proceedings of the 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2020
2019
Sensors, 2019
Proceedings of the VLSI-SoC: New Technology Enabler, 2019
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
2018
Proceedings of the 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2018
2017
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017
2016
Distributed Software Infrastructure for Evaluating the Integration of Photovoltaic Systems in Urban Districts.
Proceedings of the SMARTGREENS 2016, 2016
Proceedings of the 2nd IEEE International Forum on Research and Technologies for Society and Industry Leveraging a better tomorrow, 2016
Proceedings of the IECON 2016, 2016
Proceedings of the 11th International Design & Test Symposium, 2016
2015
Microprocess. Microsystems, 2015
A new distributed framework for integration of district energy data from heterogeneous devices.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2014
Multi-domain simulation as a foundation for the engineering of smart systems: Challenges and the SMAC vision.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
2013
IEEE Trans. Ind. Informatics, 2013
On the Functional Test of the Register Forwarding and Pipeline Interlocking Unit in Pipelined Processors.
Proceedings of the 14th International Workshop on Microprocessor Test and Verification, 2013
A functional test algorithm for the register forwarding and pipeline interlocking unit in pipelined microprocessors.
Proceedings of the 8th International Design and Test Symposium, 2013
2012
On the use of embedded debug features for permanent and transient fault resilience in microprocessors.
Microprocess. Microsystems, 2012
Proceedings of the 17th IEEE European Test Symposium, 2012
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012
2011
Proceedings of the 16th European Test Symposium, 2011
An FPGA-Emulation-Based Platform for Characterization of Digital Baseband Communication Systems.
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011
Fault grading of software-based self-test procedures for dependable automotive applications.
Proceedings of the Design, Automation and Test in Europe, 2011
2010
IEEE Trans. Dependable Secur. Comput., 2010
Exploiting an infrastructure-intellectual property for systems-on-chip test, diagnosis and silicon debug.
IET Comput. Digit. Tech., 2010
A Fault Grading Methodology for Software-Based Self-Test Programs in Systems-on-Chip.
Proceedings of the 11th International Workshop on Microprocessor Test and Verification, 2010
Proceedings of the 11th Latin American Test Workshop, 2010
Proceedings of the 2011 IEEE International Test Conference, 2010
A novel scalable and reconfigurable emulation platform for embedded systems verification.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Analysis of root causes of alpha sensitivity variations on microprocessors manufactured using different cell layouts.
Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010
Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010
Proceedings of the 15th European Test Symposium, 2010
Proceedings of the 15th European Test Symposium, 2010
2009
Effective Diagnostic Pattern Generation Strategy for Transition-Delay Faults in Full-Scan SOCs.
IEEE Trans. Very Large Scale Integr. Syst., 2009
Proceedings of the 27th IEEE VLSI Test Symposium, 2009
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
Exploiting embedded FPGA in on-line software-based test strategies for microprocessor cores.
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
Proceedings of the 14th IEEE European Test Symposium, 2009
2008
A Novel SBST Generation Technique for Path-Delay Faults in Microprocessors Exploiting Gate- and RT-Level Descriptions.
Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008
A Deterministic Methodology for Identifying Functionally Untestable Path-Delay Faults in Microprocessor Cores.
Proceedings of the Ninth International Workshop on Microprocessor Test and Verification, 2008
Exploiting MOEA to Automatically Geneate Test Programs for Path-Delay Faults in Microprocessors.
Proceedings of the Applications of Evolutionary Computing, 2008
Proceedings of the 13th European Test Symposium, 2008
2007
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
On the Automatic Generation of Test Programs for Path-Delay Faults in Microprocessor Cores.
Proceedings of the 12th European Test Symposium, 2007
An Effective Approach for the Diagnosis of Transition-Delay Faults in SoCs, based on SBST and Scan Chains.
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007
2006
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006
Proceedings of the 2006 IEEE International Test Conference, 2006
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006
2005
Proceedings of the Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), 2005
Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005
Proceedings of the 10th European Test Symposium, 2005