Nan Qi

According to our database, Nan Qi authored at least 77 papers between 2009 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

A 56-Gb/s, 6.3-pJ/bit PAM-4 DFB Laser Driver Incorporating Asymmetric Equalization and Integrated CDR in 28 nm CMOS.

Yang Min, Nan Qi, Yihan Chen, Yi Zhang, Minye Zhu, Guike Li, Yonghui Lin, Huiyao Peng, Mo Guang, Kaiwen Long, Zhao Zhang, Jian Liu, Nanjian Wu, Jingbo Shi, Yong Chen, Frank F. Shi, Liyuan Liu

IEEE Trans. Very Large Scale Integr. Syst., October, 2025

A Monolithically Integrated DWDM Si-Photonics Transceiver for Chiplet Optical I/O.

Nan Qi, Qianli Ma, Ang Li, Minye Zhu, Ruoyu Wu, Yongliang Xiong, Yingjie Ma, Haoran Yin, Han Liu, Menghan Yang, Daofa Wang, Peng Wang, Yang Qu, Yujun Xie, Guike Li, Liyuan Liu, Ming Li

IEEE J. Solid State Circuits, October, 2025

A Six-Phase Harmonic-Rejection Digital Transmitter.

Jiaxiang Li, Zimu Li, Yun Yin, Changgu Yan, Nan Qi, Ming Liu, Hongtao Xu

IEEE J. Solid State Circuits, August, 2025

A 4λ×128Gb/s PAM-4 Si-Photonic Transmitter with Micro-Ring Modulator and Co-designed Linear Driver for Chiplet Optical I/O.

Siyuan Ma, Yingjie Ma, Chaoyang Dai, Sikai Chen, Qianli Ma, Yihan Chen, Haoran Yin, Yujun Xie, Guike Li, Jian Liu, Ming Li, Liyuan Liu, Nan Qi

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2025

19.8 A 0.65V-VDD 10.4-to-11.8GHz Fractional-N Sampling PLL Achieving 73.8fsrms Jitter, -271.5dB FoMN, and -61 dBc in-Band Fractional Spur in 40nm CMOS.

Xinyu Shen, Zhao Zhang, Yixi Li, Junjie Chen, Xiangjian Kong, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

A 22.4-25.6GHz Ping-Pong Sub-Sampling PLL Featuring Unified Supply Voltage and Balanced 2^nd Harmonic Extraction Achieving 45.8fsrms Jitter and -254.3dB FoM.

Yunbo Huang, Zunsong Yang, Hongyu Ren, Rui Paulo Martins, Yan Lu, Nan Sun, Nan Qi, Yong Chen

Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

2024

A 4×112 Gb/s PAM-4 Silicon-Photonic Transmitter and Receiver Chipsets for Linear-Drive Co-Packaged Optics.

Han Liu, Zhihan Zhang, Ye Liu, Daigao Chen, Donglai Lu, Jian He, Guike Li, Min Liu, Ziyue Dang, Xi Xiao, Nan Qi

IEEE J. Solid State Circuits, October, 2024

A Bio-Inspired Spiking Vision Chip Based on SPAD Imaging and Direct Spike Computing for Versatile Edge Vision.

Xu Yang, Chunhe Yao, Lei Kang, Qian Luo, Nan Qi, Runjiang Dou, Shuangming Yu, Peng Feng, Zhongming Wei, Jian Liu, Kaiyou Wang, Nanjian Wu, Liyuan Liu

IEEE J. Solid State Circuits, June, 2024

A 32Gb/s NRZ Low-Bias DFB Driver with Frequency Boosting for High Efficiency Data Transmission.

Yang Min, Yi Zhang, Tao Yang, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Nanjian Wu, Yonghui Lin, Huiyao Peng, Jingbo Shi, Nan Qi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

A 64-GBaud 64-QAM Optical Coherent Transmitter with Monolithically Integrated Driver and I/Q Modulator in 45-nm SOI CMOS.

Yizhou Xu, Ruogu Deng, Jingbo Wang, Han Liu, Zhihan Zhang, Yihao Yang, Guike Li, Binhao Wang, Nan Qi, Liyuan Liu

Proceedings of the IEEE International Conference on Integrated Circuits, 2024

A 0.144 mm²12.5-16GHz PVT-Tolerant Dual-Path Offset-Charge-Pump-Based Fractional-N PLL Achieving 72.9 fSRMs Jitter, -271.5dB FoMN, and Sub-10% Jitter Variation.

Xinyu Shen, Zhao Zhang, Yong Chen, Yixi Li, Yidan Zhang, Guike Li, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

A 64Gb/s Si-Photonic Micro-Ring Resonator Transceiver with Co-designed CMOS Driver and TIA for WDM Optical-IO.

Qianli Ma, Sikai Chen, Jintao Xue, Yingjie Ma, Yuean Gu, Chao Cheng, Yihan Chen, Haoran Yin, Guike Li, Zhao Zhang, Nanjian Wu, Ke Li, Lei Wang, Ming Li, Chao Xiang, Binhao Wang, Nan Qi, Liyuan Liu

Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2024

A 13.75-14.75-GHz 32.1-fsRMS Jitter -100.6-dBc Reference Spur -261.4-dB FoM Sub-Sampling PLL Using a KPD-Doubled Isolated Sub-Sampling Phase Detector for Reliable Spur-Jitter-Joint Optimization.

Yiqing Xu, Yixi Li, Zhao Zhang, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024

A 200Gb/s, 3.5pJ/bit Monolithically Integrated WDM SiPhotonic Transceiver for Chiplet Optical I/O.

Qianli Ma, Ang Li, Yongliang Xiong, Yingjie Ma, Haoran Yin, Han Liu, Minye Zhu, Menghan Yang, Ye Jin, Daofa Wang, Peng Wang, Yang Qu, Yujun Xie, Guike Li, Liyuan Liu, Nan Qi, Ming Li

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024

2023

A 50Gb/s CMOS Optical Receiver With Si-Photonics PD for High-Speed Low-Latency Chiplet I/O.

Sikai Chen, Mingyang You, Yunqi Yang, Ye Jin, Ziyi Lin, Yihong Li, Leliang Li, Guike Li, Yujun Xie, Zhao Zhang, Binhao Wang, Ningfeng Tang, Faju Liu, Zheyu Fang, Jian Liu, Nanjian Wu, Yong Chen, Liyuan Liu, Ninghua Zhu, Ming Li, Nan Qi

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2023

A 64-Gb/s Reference-Less PAM4 CDR with Asymmetrical Linear Phase Detector Soring 231.5-fsrms Clock Jitter and 0.21-pJ/bit Energy Efficiency in 40-nm CMOS.

Zhao Zhang, Zhaoyu Zhang, Yong Chen, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

A O.4V-VDD 2.25-to-2.75GHz ULV-SS-PLL Achieving 236.6fsrms Jitter, -253.8dB Jitter-Power FoM, and -76.1dBc Reference Spur.

Zhao Zhang, Xinyu Shen, Zhaoyu Zhang, Guike Li, Nan Qi, Jian Liu, Yong Chen, Nanjian Wu, Liyuan Liu

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

An 800G Integrated Silicon-Photonic Transmitter based on 16-Channel Mach-Zehnder Modulator and Co-Designed 5.35pJ/bit CMOS Drivers.

Jingbo Shi, Han Liu, Tao Yang, Ming Jin, Haowen Shu, Fenghe Yang, Lei Shi, Yuansheng Tao, Jianrui Deng, Ruixuan Chen, Changhao Han, Jian Liu, Nanjian Wu, Nan Qi, Liyuan Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A 400-Gb/s 64-QAM Optical Receiver with Monolithically Integrated TIA and Balanced-PD in 45-nm SOI CMOS.

Yongliang Xiong, Yihao Yang, Qianli Ma, Yangming Ren, Leliang Li, Guike Li, Jian Liu, Yingtao Li, Binhao Wang, Nan Qi, Liyuan Liu

Proceedings of the IEEE International Conference on Integrated Circuits, 2023

A 0.0035-mm² 0.42-pJ/bit 8-32-Gb/s Reference-Less CDR Incorporating Adaptively-Biased ChargeSharing Integrator, Alexander PFD, and 1-Tap DFE.

Zhaoyu Zhang, Zhao Zhang, Yong Chen, Guoqing Wang, Xinyu Shen, Nan Qi, Guike Li, Shuangming Yu, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

A 4-12.1-GHz Fractional-N Ring Sampling PLL Based on Adaptively-Biased PD-Merged DTC Achieving -37.6± 0.9-dBc Integrated Phase Noise, 261.9-fs RMS Jitter, and -240.6-dB FoM.

Xinyu Shen, Zhao Zhang, Guike Li, Yong Chen, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

A Wideband Low-Noise Linear LiDAR Analog Front-End Achieving 1.6 GHz Bandwidth, $\boldsymbol{2.7}\ \mathbf{pA}/\mathbf{Hz}^{\boldsymbol{0.5}}$ Input Referred Noise, and 103 $\mathbf{dB}\mathbf{\Omega}$ Transimpedance Gain.

Yidan Zhang, Zhao Zhang, Yiqing Xu, Xinyu Shen, Nan Qi, Nanjian Wu, Jian Liu, Liyuan Liu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

A $\boldsymbol{4} \times \boldsymbol{112}-\mathbf{Gb}/\mathbf{s}$ PAM-4 Silicon-Photonic Transceiver Front-End for Linear-Drive Co-Packaged Optics.

Han Liu, Nan Qi, Donglai Lu, Zizheng Dong, Zhihan Zhang, Jian He, Guike Li, Leliang Li, Ye Liu, Ziyue Dang, Daigao Chen, Zhao Zhang, Jian Liu, Nanjian Wu, Xi Xiao, Liyuan Liu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

A 12.75-to-16-GHz Spur-Jitter-Joint-Optimization SS-PLL Achieving -94.55-dBc Reference Spur, 31.9-fs Integrated Jitter and -260.1-dB FoM.

Yixi Li, Zhao Zhang, Yong Chen, Xinyu Shen, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

2022

A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS.

Jian He, Yuguang Zhang, Han Liu, Qiwen Liao, Zhao Zhang, Miaofeng Li, Fan Jiang, Jingbo Shi, Jian Liu, Nanjian Wu, Yong Chen, Patrick Yin Chiang, Ningmei Yu, Xi Xiao, Nan Qi

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Design of a PAM-4 VCSEL-Based Transceiver Front-End for Beyond-400G Short-Reach Optical Interconnects.

Jian He, Donglai Lu, Haiyun Xue, Sikai Chen, Han Liu, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Liyuan Liu, Nanjian Wu, Ningmei Yu, Fengman Liu, Xi Xiao, Yong Chen, Nan Qi

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR.

Qiwen Liao, Yuguang Zhang, Siyuan Ma, Lei Wang, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Nanjian Wu, Liyuan Liu, Yong Chen, Xi Xiao, Nan Qi

IEEE J. Solid State Circuits, 2022

A 28-Gb/s 13.8-mW Half-Rate Bang-Bang Clock and Data Recovery Circuit Using Return-to-Zero-Based Symmetrical Bang-Bang Phase Detector.

Xinyi Ge, Yong Chen, Lin Wang, Nan Qi, Pui-In Mak, Rui Paulo Martins

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2022, Oslo, 2022

A 56Gb/s De-serializer with PAM-4 CDR for Chiplet Optical-I/O.

Yunqi Yang, Ming Zhong, Qianli Ma, Ziyi Lin, Leliang Li, Guike Li, Liyuan Liu, Jian Liu, Nanjian Wu, Haikun Jia, Xinghui Liu, Nan Qi

Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

Floorplanning and Power/Ground Network Design for A Programmable Vision Chip.

Haozhe Xu, Siyuan Wei, Nan Qi, Peng Wu, Jian Liu, Nanjian Wu, Liyuan Liu, Shuangming Yu

Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

A 224-Gb/s Inverter-Based TIA with Interleaved Active-Feedback and Distributed Peaking in 28-nm CMOS for Silicon Photonic Receivers.

Sikai Chen, Jintao Xue, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Liyuan Liu, Binhao Wang, Yingtao Li, Nan Qi

Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

A 0.006-mm²6-to-20-Gb/s NRZ Bang-Bang Clock and Data Recovery Circuit With Dual-Path Loop.

Zhaoyu Zhang, Xinyu Shen, Yixi Li, Guike Li, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu, Yong Chen, Zhao Zhang

Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

A 0.004-mm² O.7-V 31.654-μW BPSK Demodulator Incorporating Dual-Path Loop Self-Biased PLL.

Yixi Li, Xinyu Shen, Zhaoyu Zhang, Guike Li, Tao Yin, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu, Yong Chen, Zhao Zhang

Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

A 50-Gb/s NRZ Receiver Targeting Low-Latency Multi-Chip Module Optical I/O in 45-nm SOI CMOS.

Yihong Li, Sikai Chen, Yunqi Yang, Qianli Ma, Ming Zhong, Ziyi Lin, Leliang Li, Guike Li, Zhao Zhang, Liyuan Liu, Jian Liu, Nanjian Wu, Yong Chen, Qi Peng, Nan Qi

Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

2021

A 4×25-Gb/s Serializer with Integrated CDR and 3-Tap FFE Driver for NIC Optical Interconnects.

Ming Zhong, Qingwen Wang, Yong Chen, Jian Liu, Liyuan Liu, Xinghua Wang, Xiaoming Xiong, Nan Qi

Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A 4×25Gb/s De-Serializer with Baud-Rate Sampling CDR and Standing-Wave Clock Distribution for NIC Optical Interconnects.

Mingyang You, Minjia Chen, Yihong Li, Guike Li, Jian Liu, Yong Chen, Yingtao Li, Nan Qi

Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A Fast-Transient Capacitor-Less Low-Dropout Regulator for Wideband Optical Transceivers.

Han Liu, Guike Li, Jian Liu, Nanjian Wu, Liyuan Liu, Yingtao Li, Nan Qi

Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A 32×32 Array Terahertz Sensor in 65-nm CMOS Technology.

Tong Fang, Min Liu, Liyuan Liu, Ziteng Cai, Runjiang Dou, Peng Feng, Nan Qi, Zhao Zhang, Jian Liu, Nanjian Wu

Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A 50Gb/s High-Efficiency Si-Photonic Transmitter With Lump-Segmented MZM and Integrated PAM4 CDR.

Qiwen Liao, Miaofeng Li, Zhao Zhang, Jian Liu, Nanjian Wu, Xi Xiao, Nan Qi

Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

100Gb/s PAM-4 VCSEL Driver and TIA for Short-Reach 400G-1.6T Optical Interconnects.

Donglai Lu, Jian He, Weizhong Li, Sikai Chen, Jian Liu, Nanjian Wu, Ningmei Yu, Liyuan Liu, Yong Chen, Xi Xiao, Nan Qi

Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021

2020

A 50-Gb/s PAM4 Si-Photonic Transmitter With Digital-Assisted Distributed Driver and Integrated CDR in 40-nm CMOS.

Qiwen Liao, Nan Qi, Miaofeng Li, Shang Hu, Jian He, Bozhi Yin, Jingbo Shi, Jian Liu, Patrick Yin Chiang, Xi Xiao, Nanjian Wu

IEEE J. Solid State Circuits, 2020

A 50Gb/s PAM-4 Optical Receiver with Si-Photonic PD and Linear TIA in 40nm CMOS.

Yang Liu, Nan Qi, Xiuli Xu, Weizhong Li, Lei Wang, Minjia Chen, Qixiang Cheng, Jingbo Shi, Liyuan Liu, Jian Liu, Xi Xiao, Nanjian Wu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A 112-Gb/s PAM-4 Linear Optical Receiver in 130-nm SiGe BiCMOS.

Dan Li, Shengwei Gao, Yongjun Shi, Xiaoyan Gui, Nan Qi, Zhiyong Li, Quan Pan, Patrick Chiang, Li Geng

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A High-Speed Parallel FPGA Implementation of Harris Corner Detection.

Hongtao Zhou, Runjiang Dou, Shuangming Yu, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A 28GBaud High-Swing Linear Mach-Zehnder Modulators Driver for PAM-4 and Coherent Optical Communications.

Kai Hao, Jian He, Leliang Li, Shuangming Yu, Liyuan Liu, Jian Liu, Ningmei Yu, Nanjian Wu, Nan Qi

Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

2019

An 18-23 GHz 57.4-fs RMS Jitter -253.5-dB FoM Sub-Harmonically Injection-Locked All-Digital PLL With Single-Ended Injection Technique and ILFD Aided Adaptive Injection Timing Alignment Technique.

Zhao Zhang, Jincheng Yang, Liyuan Liu, Nan Qi, Peng Feng, Jian Liu, Nanjian Wu

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A Fully Integrated 25 Gb/s Low-Noise TIA+CDR Optical Receiver Designed in 40-nm-CMOS.

Juncheng Wang, Quan Pan, Yajie Qin, Xuefeng Chen, Shang Hu, Rui Bai, Xin Wang, Yaxin Cai, Tao Xia, Yuanxi Zhang, Jianxu Ma, Nan Qi, Patrick Yin Chiang

IEEE Trans. Circuits Syst. II Express Briefs, 2019

0.1-5 GHz wideband ΔΣ fractional-N frequency synthesiser for software-defined radio application.

Zhao Zhang, Jincheng Yang, Liyuan Liu, Nan Qi, Peng Feng, Jian Liu, Nanjian Wu

IET Circuits Devices Syst., 2019

A 0.45-to-1.8 GHz synthesized injection-locked bang-bang phase locked loop with fine frequency tuning circuits.

Jincheng Yang, Zhao Zhang, Nan Qi, Liyuan Liu, Jian Liu, Nanjian Wu

Sci. China Inf. Sci., 2019

A 50Gb/s PAM-4 Retimer-CDR + VCSEL Driver with Asymmetric Pulsed Pre-Emphasis Integrated into a Single CMOS Die.

Shang Hu, Tingyu Yao, Bozhi Yin, Chunyu Song, Lei Zhao, Juncheng Wang, Lei Wang, Rui Bai, Xin Wang, Tao Xia, Yi Peng, Binbin Yao, Yuan Li, Xuefeng Chen, Quan Pan, Nan Qi, Patrick Yin Chiang

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019

Design of High-Speed Drivers for 56Gb/s PAM4 Optical Communications in CMOS.

Nan Qi, Nanjian Wu

Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018

A 77-GHz Mixed-Mode FMCW Signal Generator Based on Bang-Bang Phase Detector.

Jianfu Lin, Zheng Song, Nan Qi, Woogeun Rhee, Zhihua Wang, Baoyong Chi

IEEE J. Solid State Circuits, 2018

Low-power 2.4 GHz ZigBee transceiver with inductor-less radio-frequency front-end for Internet of things applications.

Bing Xia, Nan Qi

IET Circuits Devices Syst., 2018

A 50Gb/s-PAM4 CDR with On-Chip Eye Opening Monitor for Reference-Level and Clock-Sampling Adaptation.

Chang Liu, Bozhi Yin, Tingyu Yao, Nan Qi, Dan Li, Jingbo Shi, Juncheng Wang, Hu Shang, Rui Bai, Patrick Yin Chiang

Proceedings of the Optical Fiber Communications Conference and Exposition, 2018

A 3D-Integrated 56 Gb/s NRZ/PAM4 Reconfigurable Segmented Mach-Zehnder Modulator-Based Si-Photonics Transmitter.

Cheng Li, Kunzhi Yu, Jinsoo Rhim, Kehan Zhu, Nan Qi, Marco Fiorentino, Thierry Pinguet, Mark Peterson, Vishal Saxena, Samuel Palermo

Proceedings of the 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2018

A Fast Auto-Frequency Calibration Technique for Wideband PLL with Wide Reference Frequency Range.

Zhao Zhang, Jincheng Yang, Liyuan Liu, Nan Qi, Peng Feng, Jian Liu, Nanjian Wu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

A Fully-Integrated 25Gb/s Low-Noise TIA+CDR Optical Receiver designed in 40nm-CMOS.

Juncheng Wang, Xuefeng Chen, Shang Hu, Yaxin Cai, Rui Bai, Xin Wang, Yuanxi Zhang, Shenglong Zhuo, Chang Liu, Bozhi Yin, Jianxu Ma, Hao Yan, Jiangao Xuan, Milton Lu, Tao Xia, Nan Qi, Patrick Yin Chiang

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017

A low-power 2.4GHz ZigBee transceiver with inductor-less RF front-end for IoT applications.

Bing Xia, Nan Qi, Liyuan Liu, Nanjian Wu

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A 51Gb/s, 320mW, PAM4 CDR with baud-rate sampling for high-speed optical interconnects.

Nan Qi, Yuhang Kang, Qipeng Lin, Jianxu Ma, Jingbo Shi, Bozhi Yin, Chang Liu, Rui Bai, Shang Hu, Juncheng Wang, Jiangbing Du, Lin Ma, Zuyuan He, Ming Liu, Feng Zhang, Patrick Yin Chiang

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

A 77-GHz mixed-mode FMCW signal generator based on bang-bang phase detector.

Jianfu Lin, Zheng Song, Nan Qi, Woogeun Rhee, Baoyong Chi

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2016

A 5-/20-MHz BW Reconfigurable Quadrature Bandpass CT ΔΣ ADC With AntiPole-Splitting Opamp and Digital I/Q Calibration.

Yang Xu, Zehong Zhang, Baoyong Chi, Nan Qi, Hualin Cai, Zhihua Wang

IEEE Trans. Very Large Scale Integr. Syst., 2016

A 32Gb/s NRZ, 25GBaud/s PAM4 reconfigurable, Si-Photonic MZM transmitter in CMOS.

Nan Qi, Xi Xiao, Shang Hu, Miaofeng Li, Hao Li, Zhiyong Li, Patrick Chiang

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2016

2015

A 25 Gb/s, 4.4 V-Swing, AC-Coupled Ring Modulator-Based WDM Transmitter with Wavelength Stabilization in 65 nm CMOS.

Hao Li, Zhe Xuan, Alex Titriku, Cheng Li, Kunzhi Yu, Binhao Wang, Ayman Shafik, Nan Qi, Yang Liu, Ran Ding, Tom Baehr Jones, Marco Fiorentino, Michael Hochberg, Samuel Palermo, Patrick Yin Chiang

IEEE J. Solid State Circuits, 2015

A 25Gb/s, 520mW, 6.4Vpp Silicon-Photonic Mach-Zehnder Modulator with distributed driver in CMOS.

Nan Qi, Xianyao Li, Hao Li, Xi Xiao, Lei Wang, Zhiyong Li, Zhuo Gao, Yude Yu, Miki Moyal, Patrick Chiang

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015

22.6 A 25Gb/s 4.4V-swing AC-coupled Si-photonic microring transmitter with 2-tap asymmetric FFE and dynamic thermal tuning in 65nm CMOS.

Hao Li, Zhe Xuan, Alex Titriku, Cheng Li, Kunzhi Yu, Binhao Wang, Ayman Shafik, Nan Qi, Yang Liu, Ran Ding, Tom Baehr Jones, Marco Fiorentino, Michael Hochberg, Samuel Palermo, Patrick Yin Chiang

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

A 20 μW dual-channel analog front-end in 65nm CMOS for portable ECG monitoring system.

Shuo Li, Nan Qi, Vahid Behravan, Zhiliang Hong, Patrick Yin Chiang

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014

A Low-Power, Low-Voltage WBAN-Compatible Sub-Sampling PSK Receiver in 65 nm CMOS.

Jiao Cheng, Nan Qi, Patrick Yin Chiang, Arun Natarajan

IEEE J. Solid State Circuits, 2014

9.6 A 1.3mW 0.6V WBAN-compatible sub-sampling PSK receiver in 65nm CMOS.

Jiao Cheng, Nan Qi, Patrick Yin Chiang, Arun Natarajan

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

A multi-mode reconfigurable analog baseband with I/Q calibration for GNSS receivers.

Zheng Song, Nan Qi, Baoyong Chi, Zhihua Wang

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

A multi-mode complex bandpass filter with gm-assisted power optimization and I/Q calibration.

Nan Qi, Zheng Song, Baoyong Chi, Albert Z. Wang, Tianling Ren, Zhihua Wang

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A 180nm fully-integrated dual-channel reconfigurable receiver for GNSS interoperations.

Nan Qi, Baoyong Chi, Yang Xu, Zhou Chen, Yang Xu, Jun Xie, Zheng Song, Zhihua Wang

Proceedings of the ESSCIRC 2013, 2013

An asymmetric dual-channel reconfigurable receiver for GNSS in 180nm CMOS.

Nan Qi, Baoyong Chi, Yang Xu, Zhou Chen, Jun Xie, Yang Xu, Zheng Song, Zhihua Wang

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

Power-Scalable, Complex Bandpass/Low-Pass Filter With I/Q Imbalance Calibration for a Multimode GNSS Receiver.

Yang Xu, Baoyong Chi, Xiaobao Yu, Nan Qi, Patrick Chiang, Zhihua Wang

IEEE Trans. Circuits Syst. II Express Briefs, 2012

A Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65 nm CMOS With On-Chip I/Q Calibration.

Nan Qi, Yang Xu, Baoyong Chi, Yang Xu, Xiaobao Yu, Xing Zhang, Ni Xu, Patrick Chiang, Woogeun Rhee, Zhihua Wang

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

A hybrid approach to I/Q imbalance self-calibration in reconfigurable low-IF receivers.

Yang Xu, Nan Qi, Zhou Chen, Baoyong Chi, Zhihua Wang

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

A dual-channel GPS/Compass/Galileo/GLONASS reconfigurable GNSS receiver in 65nm CMOS.

Nan Qi, Yang Xu, Baoyong Chi, Yang Xu, Xiaobao Yu, Xing Zhang, Zhihua Wang

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2009

A Wireless Capsule Endoscope System With Low-Power Controlling and Processing ASIC.

Xinkai Chen, Xiaoyu Zhang, Lingwei Zhang, Xiaowen Li, Nan Qi, Hanjun Jiang, Zhihua Wang

IEEE Trans. Biomed. Circuits Syst., 2009