Carles Hernández

According to our database, Carles Hernández authored at least 94 papers between 2009 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

A Safety-Critical, RISC-V SoC Integrated and ASIC-Ready Classic McEliece Accelerator.

Vatistas Kostalabros, Jordi Ribes-González, Oriol Farràs, Miquel Moretó, Carles Hernández

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2024

2023

Accurately Measuring Contention in Mesh NoCs in Time-Sensitive Embedded Systems.

Jordi Cardona, Carles Hernández, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla

ACM Trans. Design Autom. Electr. Syst., 2023

A Survey of Recent Developments in Testability, Safety and Security of RISC-V Processors.

Jens Anders, Pablo Andreu, Bernd Becker, Steffen Becker, Riccardo Cantoro, Nikolaos Ioannis Deligiannis, Nourhan Elhamawy, Tobias Faller, Carles Hernández, Nele Mentens, Mahnaz Namazi Rizi, Ilia Polian, Abolfazl Sajadi, Matthias Sauer, Denis Schwachhofer, Matteo Sonza Reorda, Todor Stefanov, Ilya Tuzov, Stefan Wagner, Nusa Zidaric

Proceedings of the IEEE European Test Symposium, 2023

BAFFI: a bit-accurate fault injector for improved dependability assessment of FPGA prototypes.

Ilya Tuzov, David de Andrés, Juan-Carlos Ruiz-Garcia, Carles Hernández

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

NimbleAI: Towards Neuromorphic Sensing-Processing 3D-integrated Chips.

Xabier Iturbe, Nassim Abderrahmane, Jaume Abella, Sergi Alcaide, Eric Beyne, Henri-Pierre Charles, Christelle Charpin-Nicolle, Lars Chittka, Angélica Dávila, Arne Erdmann, Carles Estrada, Ander Fernández, Anna Fontanelli, José Flich, Gianluca Furano, Alejandro Hernán Gloriani, Erik Isusquiza, Radu Grosu, Carles Hernández, Daniele Ielmini, David Jackson, Maha Kooli, Nicola Lepri, Bernabé Linares-Barranco, Jean-Loup Lachese, Eric Laurent, Menno Lindwer, Frank Linsenmaier, Mikel Luján, Karel Masarík, Nele Mentens, Orlando Moreira, Chinmay Nawghane, Luca Peres, Jean-Philippe Noel, Arash Pourtaherian, Christoph Posch, Peter Priller, Zdenek Prikryl, Felix Resch, Oliver Rhodes, Todor P. Stefanov, Moritz Storring, Michele Taliercio, Rafael Tornero, Marcel D. van de Burgwal, Geert Van der Plas, Elisa Vianello, Pavel Zaykov

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

Achieving Diverse Redundancy for GPU Kernels.

Sergi Alcaide, Leonidas Kosmidis, Carles Hernández, Jaume Abella

IEEE Trans. Emerg. Top. Comput., 2022

A Security Model for Randomization-based Protected Caches.

Jordi Ribes-González, Oriol Farràs, Carles Hernández, Vatistas Kostalabros, Miquel Moretó

IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

End-to-End QoS for the Open Source Safety-Relevant RISC-V SELENE Platform.

Pablo Andreu, Carles Hernández, Tomás Picornell, Pedro López, Sergi Alcaide, Francisco Bas, Pedro Benedicte, Guillem Cabo, Feng Chang, Francisco Fuentes, Jaume Abella

CoRR, 2022

Efficient Inference Of Image-Based Neural Network Models In Reconfigurable Systems With Pruning And Quantization.

José Flich, Laura Medina, Izan Catalán, Carles Hernández, Andrea Bragagnolo, Fabrice Auzanneau, David Briand

Proceedings of the 2022 IEEE International Conference on Image Processing, 2022

DVINO: A RISC-V Vector Processor Implemented in 65nm Technology.

Guillem Cabo, Gerard Candón, Xavier Carril, Max Doblas, Marc Domínguez, Alberto González, César Hernández, Víctor Jiménez, Vatistas Kostalampros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Jonnatan Mendoza, Francesco Minervini, Julián Pavón, Cristóbal Ramírez, Narcís Rodas, Enrico Reggiani, Mario Rodríguez, Carlos Rojas, Abraham Ruiz, Víctor Soria, Alejandro Suanes, Iván Vargas, Roger Figueras, Pau Fontova, Joan Marimon, Víctor Montabes, Adrián Cristal, Carles Hernández, Ricardo Martínez, Miquel Moretó, Francesc Moll, Oscar Palomar, Marco A. Ramírez, Antonio Rubio, Jordi Sacristán, Francisco Serra-Graells, Nehir Sönmez, Lluís Terés, Osman S. Unsal, Mateo Valero, Luís Villa

Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

The SELENE Deep Learning Acceleration Framework for Safety-related Applications.

Laura Medina, Salva Carrion, Pablo Andreu, Tomás Picornell, José Flich, Carles Hernández, Michael Sandoval, Markel Sainz, Charles-Alexis Lefebvre, Martin Rönnbäck, Martin Matschnig, Matthias Wess, Herbert Taucher

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

SafeSU-2: a Safe Statistics Unit for Space MPSoCs.

Guillem Cabo, Sergi Alcaide, Carles Hernández, Pedro Benedicte, Francisco Bas, Fabio Mazzocchetti, Jaume Abella

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

Worst-Case Energy Consumption: A New Challenge for Battery-Powered Critical Devices.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

IEEE Trans. Sustain. Comput., 2021

Enforcing Predictability of Many-Cores With DCFNoC.

Tomás Picornell, José Flich, Carles Hernández, José Duato

IEEE Trans. Computers, 2021

Predictive Reliability and Fault Management in Exascale Systems: State of the Art and Perspectives.

Ramon Canal, Carles Hernández, Rafael Tornero, Alessandro Cilardo, Giuseppe Massari, Federico Reghenzani, William Fornaciari, Marina Zapater, David Atienza, Ariel Oleksiak, Wojciech Piatek, Jaume Abella

ACM Comput. Surv., 2021

Improving the Robustness of Redundant Execution with Register File Randomization.

Ilya Tuzov, Pablo Andreu, Laura Medina, Tomás Picornell, Antonio Robles, Pedro López, José Flich, Carles Hernández

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

HLS-Based HW/SW Co-Design of the Post-Quantum Classic McEliece Cryptosystem.

Vatistas Kostalabros, Jordi Ribes-González, Oriol Farràs, Miquel Moretó, Carles Hernández

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

SafeSU: an Extended Statistics Unit for Multicore Timing Interference.

Guillem Cabo, Francisco Bas, Ruben Lorenzo, David Trilla, Sergi Alcaide, Miquel Moretó, Carles Hernández, Jaume Abella

Proceedings of the 26th IEEE European Test Symposium, 2021

Security, Reliability and Test Aspects of the RISC-V Ecosystem.

Jaume Abella, Sergi Alcaide, Jens Anders, Francisco Bas, Steffen Becker, Elke De Mulder, Nourhan Elhamawy, Frank K. Gürkaynak, Helena Handschuh, Carles Hernández, Michael Hutter, Leonidas Kosmidis, Ilia Polian, Matthias Sauer, Stefan Wagner, Francesco Regazzoni

Proceedings of the 26th IEEE European Test Symposium, 2021

From a FPGA Prototyping Platform to a Computing Platform: The MANGO Experience.

José Flich, Rafael Tornero, David Rodriguez, Davide Russo, José Maria Martínez, Carles Hernández

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

The RECIPE approach to challenges in deeply heterogeneous high performance systems.

Giovanni Agosta, William Fornaciari, David Atienza, Ramon Canal, Alessandro Cilardo, José Flich Cardo, Carles Hernández, Michal Kulczewski, Giuseppe Massari, Rafael Tornero Gavilá, Marina Zapater

Microprocess. Microsystems, 2020

HP-DCFNoC: High Performance Distributed Dynamic TDM Scheduler Based on DCFNoC Theory.

Tomás Picornell, José Flich, José Duato, Carles Hernández

IEEE Access, 2020

Distributed Training on a Highly Heterogeneous HPC System.

José Flich, Carles Hernández, Eduardo Quiñones, Roberto Paredes

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2020

Software-Only Triple Diverse Redundancy on GPUs for Autonomous Driving Platforms.

Sergi Alcaide Portet, Leonidas Kosmidis, Carles Hernández, Jaume Abella

Proceedings of the 50th Annual IEEE-IFIP International Conference on Dependable Systems and Networks, 2020

Workshop on High-performance Computing Platforms for Dependable Autonomous Systems.

Carles Hernández, Jaume Abella, Mikel Azkarate-askasua, Roman Obermaisser

Proceedings of the 50th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2020

SELENE: Self-Monitored Dependable Platform for High-Performance Safety-Critical Systems.

Carles Hernández, José Flich, Roberto Paredes, Charles-Alexis Lefebvre, Imanol Allende, Jaume Abella, David Trillin, Martin Matschnig, Bernhard Fischer, Konrad Schwarz, Jan Kiszka, Martin Rönnbäck, Johan Klockars, Nicholas Mc Guire, Franz Rammerstorfer, Christian Schwarzl, Franck Wartel, Dierk Lüdemann, Mikel Labayen

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

Software-only based Diverse Redundancy for ASIL-D Automotive Applications on Embedded HPC Platforms.

Sergi Alcaide, Leonidas Kosmidis, Carles Hernández, Jaume Abella

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

An Academic RISC-V Silicon Implementation Based on Open-Source Components.

Jaume Abella, Calvin Bulla, Guillem Cabo, Francisco J. Cazorla, Adrián Cristal, Max Doblas, Roger Figueras, Alberto González, Carles Hernández, César Hernández, Víctor Jiménez, Leonidas Kosmidis, Vatistas Kostalabros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Joan Marimon, Ricardo Martínez, Jonnatan Mendoza, Francesc Moll, Miquel Moretó, Julián Pavón, Cristóbal Ramírez, Marco Antonio Ramírez, Carlos Rojas Morales, Antonio Rubio, Abraham Ruiz, Nehir Sönmez, Víctor Soria, Lluís Terés, Osman S. Unsal, Mateo Valero, Iván Vargas Valdivieso, Luis Villa

Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

2019

Locality-aware cache random replacement policies.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

J. Syst. Archit., 2019

Time-Randomized Wormhole NoCs for Critical Applications.

Mladen Slijepcevic, Carles Hernández, Jaume Abella, Francisco J. Cazorla

ACM J. Emerg. Technol. Comput. Syst., 2019

Randomization for Safer, more Reliable and Secure, High-Performance Automotive Processors.

David Trilla, Francisco J. Cazorla, Carles Hernández, Jaume Abella

IEEE Des. Test, 2019

Probabilistic Worst-Case Timing Analysis: Taxonomy and Comprehensive Survey.

Francisco J. Cazorla, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernández, Jaume Abella, Tullio Vardanega

ACM Comput. Surv., 2019

Software-only Diverse Redundancy on GPUs for Autonomous Driving Platforms.

Sergi Alcaide, Leonidas Kosmidis, Carles Hernández, Jaume Abella

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

Modeling the Impact of Process Variations in Worst-Case Energy Consumption Estimation.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

An Approach for Detecting Power Peaks During Testing and Breaking Systematic Pathological Behavior.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

Challenges in Deeply Heterogeneous High Performance Systems.

Giovanni Agosta, William Fornaciari, David Atienza, Ramon Canal, Alessandro Cilardo, José Flich, Carles Hernández, Michal Kulczewski, Giuseppe Massari, Rafael Tornero Gavilá, Marina Zapater

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

Maximum-Contention Control Unit (MCCU): Resource Access Count and Contention Time Enforcement.

Jordi Cardona, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

LAEC: Look-Ahead Error Correction Codes in Embedded Processors L1 Data Cache.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

High-Integrity GPU Designs for Critical Real-Time Automotive Systems.

Sergi Alcaide, Leonidas Kosmidis, Carles Hernández, Jaume Abella

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

DCFNoC: A Delayed Conflict-Free Time Division Multiplexing Network on Chip.

Tomás Picornell, José Flich, Carles Hernández, José Duato

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Towards limiting the impact of timing anomalies in complex real-time processors.

Pedro Benedicte, Jaume Abella, Carles Hernández, Enrico Mezzetti, Francisco J. Cazorla

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018

Fitting Software Execution-Time Exceedance into a Residual Random Fault in ISO-26262.

Irune Agirre, Francisco J. Cazorla, Jaume Abella, Carles Hernández, Enrico Mezzetti, Mikel Azkarate-askatsua, Tullio Vardanega

IEEE Trans. Reliab., 2018

EOmesh: Combined Flow Balancing and Deterministic Routing for Reduced WCET Estimates in Embedded Real-Time Systems.

Jordi Cardona, Carles Hernández, Jaume Abella, Francisco J. Cazorla

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Safety-Related Challenges and Opportunities for GPUs in the Automotive Domain.

Sergi Alcaide, Leonidas Kosmidis, Hamid Tabani, Carles Hernández, Jaume Abella, Francisco J. Cazorla

IEEE Micro, 2018

Reconciling Time Predictability and Performance in Future Computing Systems.

Francisco J. Cazorla, Jaume Abella, Enrico Mezzetti, Carles Hernández, Tullio Vardanega, Guillem Bernat

IEEE Des. Test, 2018

Reliable power and time-constraints-aware predictive management of heterogeneous exascale systems.

William Fornaciari, Giovanni Agosta, David Atienza, Carlo Brandolese, Leila Cammoun, Luca Cremona, Alessandro Cilardo, Albert Farrés, José Flich, Carles Hernández, Michal Kulchewski, Simone Libutti, José Maria Martínez, Giuseppe Massari, Ariel Oleksiak, Anna Pupykina, Federico Reghenzani, Rafael Tornero, Michele Zanella, Marina Zapater, Davide Zoni

Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

RPR: a random replacement policy with limited pathological replacements.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 33rd Annual ACM Symposium on Applied Computing, 2018

NoCo: ILP-Based Worst-Case Contention Estimation for Mesh Real-Time Manycores.

Jordi Cardona, Carles Hernández, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2018 IEEE Real-Time Systems Symposium, 2018

HWP: Hardware Support to Reconcile Cache Energy, Complexity, Performance and WCET Estimates in Multicore Real-Time Systems.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 30th Euromicro Conference on Real-Time Systems, 2018

Design and integration of hierarchical-placement multi-level caches for real-time systems.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Cache side-channel attacks and time-predictability in high-performance critical real-time systems.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

Adapting TDMA arbitration for measurement-based probabilistic timing analysis.

Milos Panic, Jaume Abella, Eduardo Quiñones, Carles Hernández, Theo Ungerer, Francisco J. Cazorla

Microprocess. Microsystems, 2017

Modelling bus contention during system early design stages.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 12th IEEE International Symposium on Industrial Embedded Systems, 2017

Work-in-Progress Paper: An Analysis of the Impact of Dependencies on Probabilistic Timing Analysis and Task Scheduling.

Enrico Mezzetti, Jaume Abella, Carles Hernández, Francisco J. Cazorla

Proceedings of the 2017 IEEE Real-Time Systems Symposium, 2017

Design and Implementation of a Time Predictable Processor: Evaluation With a Space Case Study.

Carles Hernández, Jaume Abella, Francisco J. Cazorla, Alen Bardizbanyan, Jan Andersson, Fabrice Cros, Franck Wartel

Proceedings of the 29th Euromicro Conference on Real-Time Systems, 2017

Boosting Guaranteed Performance in Wormhole NoCs with Probabilistic Timing Analysis.

Mladen Slijepcevic, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Euromicro Conference on Digital System Design, 2017

Design and implementation of a fair credit-based bandwidth sharing scheme for buses.

Mladen Slijepcevic, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Probabilistic timing analysis on time-randomized platforms for the space domain.

Mikel Fernández, David Morales, Leonidas Kosmidis, Alen Bardizbanyan, Ian Broster, Carles Hernández, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla, Paulo Machado, Luca Fossati

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

DIMP: A Low-Cost Diversity Metric Based on Circuit Path Analysis.

Sergi Alcaide, Carles Hernández, Antoni Roca, Jaume Abella

Proceedings of the 54th Annual Design Automation Conference, 2017

MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding.

Enrique Díaz, Mikel Fernández, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Reliable Software Technologies - Ada-Europe 2017, 2017

2016

Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore.

Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jörg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel G. Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduardo Quiñones, Milos Panic, Jaume Abella, Carles Hernández, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka

ACM Trans. Embed. Comput. Syst., 2016

Fitting processor architectures for measurement-based probabilistic timing analysis.

Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Carles Hernández, Andrea Gianarro, Ian Broster, Francisco J. Cazorla

Microprocess. Microsystems, 2016

Modeling High-Performance Wormhole NoCs for Critical Real-Time Embedded Systems.

Milos Panic, Carles Hernández, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2016

Resilient random modulo cache memories for probabilistically-analyzable real-time systems.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

Modeling RTL fault models behavior to increase the confidence on TSIM-based fault injection.

Jaime Espinosa, Carles Hernández, Jaume Abella

Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

pTNoC: Probabilistically Time-Analyzable Tree-Based NoC for Mixed-Criticality Systems.

Mladen Slijepcevic, Mikel Fernández, Carles Hernández, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis.

Francisco J. Cazorla, Jaume Abella, Jan Andersson, Tullio Vardanega, Francis Vatrinet, Iain Bate, Ian Broster, Mikel Azkarate-askasua, Franck Wartel, Liliana Cucu, Fabrice Cros, Glenn Farrall, Adriana Gogonel, Andrea Gianarro, Benoit Triquet, Carles Hernández, Code Lo, Cristian Maxim, David Morales, Eduardo Quiñones, Enrico Mezzetti, Leonidas Kosmidis, Irune Agirre, Mikel Fernández, Mladen Slijepcevic, Philippa Conmy, Walid Talaboulma

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Improving performance guarantees in wormhole mesh NoC designs.

Milos Panic, Carles Hernández, Jaume Abella, Antoni Roca, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Random modulo: a new processor cache design for real-time critical systems.

Carles Hernández, Jaume Abella, Andrea Gianarro, Jan Andersson, Francisco J. Cazorla

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

Timely Error Detection for Effective Recovery in Light-Lockstep Automotive Systems.

Carles Hernández, Jaume Abella

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Area-efficient snoopy-aware NoC design for high-performance chip multiprocessor systems.

Antoni Roca, Carles Hernández, Mario Lodde, José Flich

Comput. Electr. Eng., 2015

WCET analysis methods: Pitfalls and challenges on their trustworthiness.

Jaume Abella, Carles Hernández, Eduardo Quiñones, Francisco J. Cazorla, Philippa Ryan Conmy, Mikel Azkarate-askasua, Jon Pérez, Enrico Mezzetti, Tullio Vardanega

Proceedings of the 10th IEEE International Symposium on Industrial Embedded Systems, 2015

Characterizing fault propagation in safety-critical processor designs.

Jaime Espinosa, Carles Hernández, Jaume Abella

Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

CAP: Communication-Aware Allocation Algorithm for Real-Time Parallel Applications on Many-Cores.

Milos Panic, Eduardo Quiñones, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Enabling TDMA Arbitration in the Context of MBPTA.

Milos Panic, Jaume Abella, Carles Hernández, Eduardo Quiñones, Theo Ungerer, Francisco J. Cazorla

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

IEC-61508 SIL 3 Compliant Pseudo-Random Number Generators for Probabilistic Timing Analysis.

Irune Agirre, Mikel Azkarate-askasua, Carles Hernández, Jaume Abella, Jon Pérez, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Low-cost checkpointing in automotive safety-relevant systems.

Carles Hernández, Jaume Abella

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Analysis and RTL correlation of instruction set simulators for automotive microcontroller robustness verification.

Jaime Espinosa, Carles Hernández, Jaume Abella, David de Andrés, Juan-Carlos Ruiz-Garcia

Proceedings of the 52nd Annual Design Automation Conference, 2015

2014

Parallel many-core avionics systems.

Milos Panic, Eduardo Quiñones, Pavel G. Zaykov, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2014 International Conference on Embedded Software, 2014

LiVe: Timely Error Detection in Light-Lockstep Safety Critical Systems.

Carles Hernández, Jaume Abella

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013

Silicon-aware distributed switch architecture for on-chip networks.

Antoni Roca, Carles Hernández, José Flich, Federico Silla, José Duato

J. Syst. Archit., 2013

2012

On the Impact of Within-Die Process Variation in GALS-Based NoC Performance.

Carles Hernández, Antoni Roca, Federico Silla, José Flich, José Duato

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

Enabling High-Performance Crossbars through a Floorplan-Aware Design.

Antoni Roca, Carles Hernández, José Flich, Federico Silla, José Duato

Proceedings of the 41st International Conference on Parallel Processing, 2012

Addressing Link Degradation in NoC-Based ULSI Designs.

Carles Hernández, Federico Silla, José Duato

Proceedings of the Euro-Par 2012: Parallel Processing Workshops, 2012

2011

Characterizing the impact of process variation on 45 nm NoC-based CMPs.

Carles Hernández, Antoni Roca, José Flich, Federico Silla, José Duato

J. Parallel Distributed Comput., 2011

Self-Calibrating Source Synchronous Communication for Delay Variation Tolerant GALS Network-on-Chip Design.

Alessandro Strano, Carles Hernández, Federico Silla, Davide Bertozzi

Int. J. Embed. Real Time Commun. Syst., 2011

Fault-Tolerant Vertical Link Design for Effective 3D Stacking.

Carles Hernández, Antoni Roca, José Flich, Federico Silla, José Duato

IEEE Comput. Archit. Lett., 2011

A Distributed Switch Architecture for On-Chip Networks.

Antoni Roca, Carles Hernández, José Flich, Federico Silla, José Duato

Proceedings of the International Conference on Parallel Processing, 2011

Energy and Performance Efficient Thread Mapping in NoC-Based CMPs under Process Variations.

Carles Hernández, Federico Silla, José Duato

Proceedings of the International Conference on Parallel Processing, 2011

2010

Improving the Performance of GALS-Based NoCs in the Presence of Process Variation.

Carles Hernández, Antoni Roca, Federico Silla, José Flich, José Duato

Proceedings of the NOCS 2010, 2010

Process variation and layout mismatch tolerant design of source synchronous links for GALS networks-on-chip.

Alessandro Strano, Carles Hernández, Federico Silla, Davide Bertozzi

Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

A methodology for the characterization of process variation in NoC links.

Carles Hernández, Federico Silla, José Duato

Proceedings of the Design, Automation and Test in Europe, 2010

2009

Yield-oriented evaluation methodology of network-on-chip routing implementations.

Samuel Rodrigo, Carles Hernández, José Flich, Federico Silla, José Duato, Simone Medardoni, Davide Bertozzi, Andres Mejia, Donglai Dai

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

A new mechanism to deal with process variability in NoC links.

Carles Hernández, Federico Silla, Vicente Santonja, José Duato

Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009