Jaume Abella

According to our database, Jaume Abella authored at least 246 papers between 2002 and 2023.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2023

An Energy-Efficient GeMM-Based Convolution Accelerator With On-the-Fly im2col.

Jordi Fornt, Pau Fontova-Musté, Martí Caro, Jaume Abella, Francesc Moll, Josep Altet, Christoph Studer

IEEE Trans. Very Large Scale Integr. Syst., November, 2023

Main sources of variability and non-determinism in AD software: taxonomy and prospects to handle them.

Miguel Alcon, Axel Brando, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Real Time Syst., September, 2023

Dynamic and execution views to improve validation, testing, and optimization of autonomous driving software.

Miguel Alcon, Hamid Tabani, Jaume Abella, Francisco J. Cazorla

Softw. Qual. J., June, 2023

On Neural Networks Redundancy and Diversity for Their Use in Safety-Critical Systems.

Axel Brando, Isabel Serra, Enrico Mezzetti, Francisco J. Cazorla, Jon Pérez-Cerrolaza, Jaume Abella

Computer, May, 2023

Vector Extensions in COTS Processors to Increase Guaranteed Performance in Real-Time Systems.

Roger Pujol, Josep Jorba, Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

ACM Trans. Embed. Comput. Syst., March, 2023

Uncertainty Management in Dependable and Intelligent Embedded Software.

Jon Pérez-Cerrolaza, Francisco J. Cazorla, Jaume Abella

Computer, March, 2023

Accurately Measuring Contention in Mesh NoCs in Time-Sensitive Embedded Systems.

Jordi Cardona, Carles Hernández, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla

ACM Trans. Design Autom. Electr. Syst., 2023

An automotive case study on the limits of approximation for object detection.

Martí Caro, Hamid Tabani, Jaume Abella, Francesc Moll, Enric Morancho, Ramon Canal, Josep Altet, Antonio Calomarde, Francisco J. Cazorla, Antonio Rubio, Pau Fontova, Jordi Fornt

J. Syst. Archit., 2023

GPU Devices for Safety-Critical Systems: A Survey.

Jon Pérez-Cerrolaza, Jaume Abella, Leonidas Kosmidis, Alejandro J. Calderón, Francisco J. Cazorla, Jose Luis Flores

ACM Comput. Surv., 2023

SafeTI Traffic Injector Enhancement for Effective Interference Testing in Critical Real-Time Systems.

Francisco Fuentes, Raimon Casanova, Sergi Alcaide, Jaume Abella

CoRR, 2023

SafeLS: Toward Building a Lockstep NOEL-V Core.

Marcel Sarraseca, Sergi Alcaide, Francisco Fuentes, Juan Carlos Rodriguez, Feng Chang, Ilham Lasfar, Ramon Canal, Francisco J. Cazorla, Jaume Abella

CoRR, 2023

Envisioning a Safety Island to Enable HPC Devices in Safety-Critical Domains.

Jaume Abella, Francisco J. Cazorla, Sergi Alcaide, Michael Paulitsch, Yang Peng, Inês Pinto Gouveia

CoRR, 2023

Tracking Coherence-Related Contention Delays in Real-Time Multicore Systems.

Roger Pujol, Mohamed Hassan, Hamid Tabani, Jaume Abella, Francisco Javier Cazorla-Almeida

Proceedings of the 38th ACM/SIGAPP Symposium on Applied Computing, 2023

ASCOM: Affordable Sequence-aware COntention Modeling in Crossbar-based MPSoCs.

Jeremy Jens Giesen León, Enrico Mezzetti, Jaume Abella, Francisco Javier Cazorla-Almeida

Proceedings of the 38th ACM/SIGAPP Symposium on Applied Computing, 2023

A Software-Only Approach to Enable Diverse Redundancy on Intel GPUs for Safety-Related Kernels.

Nikolaos Andriotis, Alejandro Serrano-Cases, Sergi Alcaide, Jaume Abella, Francisco J. Cazorla, Yang Peng, Andrea Baldovin, Michael Paulitsch, Vladimir Tsymbal

Proceedings of the 38th ACM/SIGAPP Symposium on Applied Computing, 2023

Improving Timing-Related Guarantees for Main Memory in Multicore Critical Embedded Systems.

Asier Fernández de Lecea, Mohamed Hassan, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the IEEE Real-Time Systems Symposium, 2023

SafeLS: An Open Source Implementation of a Lockstep NOEL-V RISC-V Core.

Marcel Sarraseca, Sergi Alcaide, Francisco Fuentes, Juan Carlos Rodriguez, Feng Chang, Ilham Lasfar, Ramon Canal, Francisco J. Cazorla, Jaume Abella

Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023

Quasi Isolation QoS Setups to Control MPSoC Contention in Integrated Software Architectures.

Sergio Garcia-Esteban, Alejandro Serrano-Cases, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla

Proceedings of the 35th Euromicro Conference on Real-Time Systems, 2023

Black-Box IP Validation with the SafeTI Traffic Injector: A Success Story.

Francisco Fuentes, Sergi Alcaide, Raimon Casanova, Jaume Abella

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

NimbleAI: Towards Neuromorphic Sensing-Processing 3D-integrated Chips.

Xabier Iturbe, Nassim Abderrahmane, Jaume Abella, Sergi Alcaide, Eric Beyne, Henri-Pierre Charles, Christelle Charpin-Nicolle, Lars Chittka, Angélica Dávila, Arne Erdmann, Carles Estrada, Ander Fernández, Anna Fontanelli, José Flich, Gianluca Furano, Alejandro Hernán Gloriani, Erik Isusquiza, Radu Grosu, Carles Hernández, Daniele Ielmini, David Jackson, Maha Kooli, Nicola Lepri, Bernabé Linares-Barranco, Jean-Loup Lachese, Eric Laurent, Menno Lindwer, Frank Linsenmaier, Mikel Luján, Karel Masarík, Nele Mentens, Orlando Moreira, Chinmay Nawghane, Luca Peres, Jean-Philippe Noel, Arash Pourtaherian, Christoph Posch, Peter Priller, Zdenek Prikryl, Felix Resch, Oliver Rhodes, Todor P. Stefanov, Moritz Storring, Michele Taliercio, Rafael Tornero, Marcel D. van de Burgwal, Geert Van der Plas, Elisa Vianello, Pavel Zaykov

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

SAFEXPLAIN: Safe and Explainable Critical Embedded Systems Based on AI.

Jaume Abella, Jon Pérez, Cristofer Englund, Bahram Zonooz, Gabriele Giordana, Carlo Donzella, Francisco J. Cazorla, Enrico Mezzetti, Isabel Serra, Axel Brando, Irune Agirre, Fernando Eizaguirre, Thanh Hai Bui, Elahe Arani, Fahad Sarfraz, Ajay Balasubramaniam, Ahmed Badar, Ilaria Bloise, Lorenzo Feruglio, Ilaria Cinelli, Davide Brighenti, Davide Cunial

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Efficient Diverse Redundant DNNs for Autonomous Driving.

Martí Caro, Jordi Fornt, Jaume Abella

Proceedings of the 47th IEEE Annual Computers, Software, and Applications Conference, 2023

Standardizing the Probabilistic Sources of Uncertainty for the sake of Safety Deep Learning.

Axel Brando, Isabel Serra, Enrico Mezzetti, Francisco J. Cazorla, Jaume Abella

Proceedings of the Workshop on Artificial Intelligence Safety 2023 (SafeAI 2023) co-located with the Thirty-Seventh AAAI Conference on Artificial Intelligence (AAAI 2023), 2023

2022

Achieving Diverse Redundancy for GPU Kernels.

Sergi Alcaide, Leonidas Kosmidis, Carles Hernández, Jaume Abella

IEEE Trans. Emerg. Top. Comput., 2022

At-scale evaluation of weight clustering to enable energy-efficient object detection.

Martí Caro, Hamid Tabani, Jaume Abella

J. Syst. Archit., 2022

End-to-End QoS for the Open Source Safety-Relevant RISC-V SELENE Platform.

Pablo Andreu, Carles Hernández, Tomás Picornell, Pedro López, Sergi Alcaide, Francisco Bas, Pedro Benedicte, Guillem Cabo, Feng Chang, Francisco Fuentes, Jaume Abella

CoRR, 2022

SafeSoftDR: A Library to Enable Software-based Diverse Redundancy for Safety-Critical Tasks.

Fabio Mazzocchetti, Sergi Alcaide, Francisco Bas, Pedro Benedicte, Guillem Cabo, Feng Chang, Francisco Fuentes, Jaume Abella

CoRR, 2022

ADBench: benchmarking autonomous driving systems.

Hamid Tabani, Roger Pujol, Miguel Alcon, Joan Moya, Jaume Abella, Francisco J. Cazorla

Computing, 2022

SafeDX: Standalone Modules Providing Diverse Redundancy for Safety-Critical Applications.

Ramon Canal, Francisco Bas, Sergi Alcaide, Guillem Cabo, Pedro Benedicte, Francisco Fuentes, Feng Chang, Ilham Lasfar, Jaume Abella

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022

At-scale assessment of weight clustering for energy-efficient object detection accelerators.

Martí Caro, Hamid Tabani, Jaume Abella

Proceedings of the SAC '22: The 37th ACM/SIGAPP Symposium on Applied Computing, Virtual Event, April 25, 2022

A Methodology for Selective Protection of Matrix Multiplications: A Diagnostic Coverage and Performance Trade-off for CNNs Executed on GPUs.

Javier Fernández, Irune Agirre, Jon Pérez-Cerrolaza, Jaume Abella, Francisco J. Cazorla

Proceedings of the 6th International Conference on System Reliability and Safety, 2022

Contention Tracking in GPU Last-Level Cache.

Javier Barrera, Leonidas Kosmidis, Hamid Tabani, Jaume Abella, Francisco J. Cazorla

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

SafeX: Open Source Hardware and Software Components for Safety-Critical Systems.

Sergi Alcaide, Guillem Cabo, Francisco Bas, Pedro Benedicte, Francisco Fuentes, Feng Chang, Ilham Lasfar, Ramon Canal, Jaume Abella

Proceedings of the Forum on Specification & Design Languages, 2022

Using Markov's Inequality with Power-Of-k Function for Probabilistic WCET Estimation.

Sergi Vilardell, Isabel Serra, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla, Joan del Castillo

Proceedings of the 34th Euromicro Conference on Real-Time Systems, 2022

Using Quantile Regression in Neural Networks for Contention Prediction in Multicore Processors.

Axel Brando, Isabel Serra, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the 34th Euromicro Conference on Real-Time Systems, 2022

De-RISC: A Complete RISC-V Based Space-Grade Platform.

Nils-Johan Wessman, Fabio Malatesta, Stefano Ribes, Jan Andersson, Antonio García-Vilanova, Miguel Masmano, Vicente Nicolau, Paco Gomez, Jimmy Le Rhun, Sergi Alcaide, Guillem Cabo, Francisco Bas, Pedro Benedicte, Fabio Mazzocchetti, Jaume Abella

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

SafeSU-2: a Safe Statistics Unit for Space MPSoCs.

Guillem Cabo, Sergi Alcaide, Carles Hernández, Pedro Benedicte, Francisco Bas, Fabio Mazzocchetti, Jaume Abella

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

SafeDM: a Hardware Diversity Monitor for Redundant Execution on Non-Lockstepped Cores.

Francisco Bas, Pedro Benedicte, Sergi Alcaide, Guillem Cabo, Fabio Mazzocchetti, Jaume Abella

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

Worst-Case Energy Consumption: A New Challenge for Battery-Powered Critical Devices.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

IEEE Trans. Sustain. Comput., 2021

Surrogate Applications for Early Design Stage Multicore Contention Modeling.

Gabriel Fernandez, Jaume Abella, Guillem Bernat, Francisco J. Cazorla

IEEE Trans. Emerg. Top. Comput., 2021

Towards functional safety compliance of matrix-matrix multiplication for machine learning-based autonomous systems.

Javier Fernández, Jon Pérez, Irune Agirre, Imanol Allende, Jaume Abella, Francisco J. Cazorla

J. Syst. Archit., 2021

Performance Analysis and Optimization Opportunities for NVIDIA Automotive GPUs.

Hamid Tabani, Fabio Mazzocchetti, Pedro Benedicte, Jaume Abella, Francisco J. Cazorla

J. Parallel Distributed Comput., 2021

Multi-core Devices for Safety-critical Systems: A Survey.

Jon Pérez-Cerrolaza, Roman Obermaisser, Jaume Abella, Francisco J. Cazorla, Kim Grüttner, Irune Agirre, Hamidreza Ahmadian, Imanol Allende

ACM Comput. Surv., 2021

Predictive Reliability and Fault Management in Exascale Systems: State of the Art and Perspectives.

Ramon Canal, Carles Hernández, Rafael Tornero, Alessandro Cilardo, Giuseppe Massari, Federico Reghenzani, William Fornaciari, Marina Zapater, David Atienza, Ariel Oleksiak, Wojciech Piatek, Jaume Abella

ACM Comput. Surv., 2021

MUCH: exploiting pairwise hardware event monitor correlations for improved timing analysis of complex MPSoCs.

Sergi Vilardell, Isabel Serra, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the SAC '21: The 36th ACM/SIGAPP Symposium on Applied Computing, 2021

SafeTI: a Hardware Traffic Injector for MPSoC Functional and Timing Validation.

Oriol Sala, Sergi Alcaide, Guillem Cabo, Francisco Bas, Ruben Lorenzo, Pedro Benedicte, David Trilla, Guillermo Gil, Fabio Mazzocchetti, Jaume Abella

Proceedings of the 27th IEEE International Symposium on On-Line Testing and Robust System Design, 2021

SafeDE: a flexible Diversity Enforcement hardware module for light-lockstepping.

Francisco Bas, Sergi Alcaide, Ruben Lorenzo, Guillem Cabo, Guillermo Gil, Oriol Sala, Fabio Mazzocchetti, David Trilla, Jaume Abella

Proceedings of the 27th IEEE International Symposium on On-Line Testing and Robust System Design, 2021

PRL: Standardizing Performance Monitoring Library for High-Integrity Real-Time Systems.

Jeremy Giesen, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the 39th IEEE International Conference on Computer Design, 2021

SafeSU: an Extended Statistics Unit for Multicore Timing Interference.

Guillem Cabo, Francisco Bas, Ruben Lorenzo, David Trilla, Sergi Alcaide, Miquel Moretó, Carles Hernández, Jaume Abella

Proceedings of the 26th IEEE European Test Symposium, 2021

Security, Reliability and Test Aspects of the RISC-V Ecosystem.

Jaume Abella, Sergi Alcaide, Jens Anders, Francisco Bas, Steffen Becker, Elke De Mulder, Nourhan Elhamawy, Frank K. Gürkaynak, Helena Handschuh, Carles Hernández, Michael Hutter, Leonidas Kosmidis, Ilia Polian, Matthias Sauer, Stefan Wagner, Francesco Regazzoni

Proceedings of the 26th IEEE European Test Symposium, 2021

Leveraging Hardware QoS to Control Contention in the Xilinx Zynq UltraScale+ MPSoC.

Alejandro Serrano-Cases, Juan M. Reina, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla

Proceedings of the 33rd Euromicro Conference on Real-Time Systems, 2021

Enabling Unit Testing of Already-Integrated AI Software Systems: The Case of Apollo for Autonomous Driving.

Miguel Alcon, Hamid Tabani, Jaume Abella, Francisco J. Cazorla

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

Empirical Evidence for MPSoCs in Critical Systems: The Case of NXP's T2080 Cache Coherence.

Roger Pujol, Hamid Tabani, Jaume Abella, Mohamed Hassan, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

HRM: Merging Hardware Event Monitors for Improved Timing Analysis of Complex MPSoCs.

Sergi Vilardell, Isabel Serra, Roberto Santalla, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

GPU4S: Embedded GPUs in space - Latest project updates.

Leonidas Kosmidis, Iván Rodriguez, Álvaro Jover, Sergi Alcaide, Jérôme Lachaize, Jaume Abella, Olivier Notebaert, Francisco J. Cazorla, David Steenari

Microprocess. Microsystems, 2020

CleanET: enabling timing validation for complex automotive systems.

Sergi Vilardell, Isabel Serra, Hamid Tabani, Jaume Abella, Joan del Castillo, Francisco J. Cazorla

Proceedings of the SAC '20: The 35th ACM/SIGAPP Symposium on Applied Computing, online event, [Brno, Czech Republic], March 30, 2020

IntPred: flexible, fast, and accurate object detection for autonomous driving systems.

Hamid Tabani, Matteo Fusi, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla

Proceedings of the SAC '20: The 35th ACM/SIGAPP Symposium on Applied Computing, online event, [Brno, Czech Republic], March 30, 2020

On the reliability of hardware event monitors in MPSoCs for critical domains.

Javier Barrera, Leonidas Kosmidis, Hamid Tabani, Enrico Mezzetti, Jaume Abella, Mikel Fernández, Guillem Bernat, Francisco J. Cazorla

Proceedings of the SAC '20: The 35th ACM/SIGAPP Symposium on Applied Computing, online event, [Brno, Czech Republic], March 30, 2020

En-Route: on enabling resource usage testing for autonomous driving frameworks.

Miguel Alcon, Hamid Tabani, Jaume Abella, Leonidas Kosmidis, Francisco J. Cazorla

Proceedings of the SAC '20: The 35th ACM/SIGAPP Symposium on Applied Computing, online event, [Brno, Czech Republic], March 30, 2020

Modeling Contention Interference in Crossbar-based Systems via Sequence-Aware Pairing (SeAP).

Jeremy Giesen, Pedro Benedicte, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2020

Timing of Autonomous Driving Software: Problem Analysis and Prospects for Future Solutions.

Miguel Alcon, Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2020

A Cross-Layer Review of Deep Learning Frameworks to Ease Their Optimization and Reuse.

Hamid Tabani, Roger Pujol, Jaume Abella, Francisco J. Cazorla

Proceedings of the 23rd IEEE International Symposium on Real-Time Distributed Computing, 2020

Tracing Hardware Monitors in the GR712RC Multicore Platform: Challenges and Lessons Learnt from a Space Case Study.

Xavier Palomo, Mikel Fernández, Sylvain Girbal, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla, Laurent Rioux

Proceedings of the 32nd Euromicro Conference on Real-Time Systems, 2020

Software-Only Triple Diverse Redundancy on GPUs for Autonomous Driving Platforms.

Sergi Alcaide Portet, Leonidas Kosmidis, Carles Hernández, Jaume Abella

Proceedings of the 50th Annual IEEE-IFIP International Conference on Dependable Systems and Networks, 2020

Workshop on High-performance Computing Platforms for Dependable Autonomous Systems.

Carles Hernández, Jaume Abella, Mikel Azkarate-askasua, Roman Obermaisser

Proceedings of the 50th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2020

The ECSEL FRACTAL Project: A Cognitive Fractal and Secure edge based on a unique Open-Safe-Reliable-Low Power Hardware Platform.

Aizea Lojo, Leire Rubio, Jesus Miguel Ruano, Tania Di Mascio, Luigi Pomante, Enrico Ferrari, Ignacio Garcìa Vega, Frank K. Gürkaynak, Mikel Labayen Esnaola, Vanessa Orani, Jaume Abella

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

SELENE: Self-Monitored Dependable Platform for High-Performance Safety-Critical Systems.

Carles Hernández, José Flich, Roberto Paredes, Charles-Alexis Lefebvre, Imanol Allende, Jaume Abella, David Trillin, Martin Matschnig, Bernhard Fischer, Konrad Schwarz, Jan Kiszka, Martin Rönnbäck, Johan Klockars, Nicholas Mc Guire, Franz Rammerstorfer, Christian Schwarzl, Franck Wartel, Dierk Lüdemann, Mikel Labayen

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

Software-only based Diverse Redundancy for ASIL-D Automotive Applications on Embedded HPC Platforms.

Sergi Alcaide, Leonidas Kosmidis, Carles Hernández, Jaume Abella

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

An Academic RISC-V Silicon Implementation Based on Open-Source Components.

Jaume Abella, Calvin Bulla, Guillem Cabo, Francisco J. Cazorla, Adrián Cristal, Max Doblas, Roger Figueras, Alberto González, Carles Hernández, César Hernández, Víctor Jiménez, Leonidas Kosmidis, Vatistas Kostalabros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Joan Marimon, Ricardo Martínez, Jonnatan Mendoza, Francesc Moll, Miquel Moretó, Julián Pavón, Cristóbal Ramírez, Marco Antonio Ramírez, Carlos Rojas Morales, Antonio Rubio, Abraham Ruiz, Nehir Sönmez, Víctor Soria, Lluís Terés, Osman S. Unsal, Mateo Valero, Iván Vargas Valdivieso, Luis Villa

Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

2019

Increasing the Reliability of Software Timing Analysis for Cache-Based Processors.

Suzana Milutinovic, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

IEEE Trans. Computers, 2019

Locality-aware cache random replacement policies.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

J. Syst. Archit., 2019

Time-Randomized Wormhole NoCs for Critical Applications.

Mladen Slijepcevic, Carles Hernández, Jaume Abella, Francisco J. Cazorla

ACM J. Emerg. Technol. Comput. Syst., 2019

Randomization for Safer, more Reliable and Secure, High-Performance Automotive Processors.

David Trilla, Francisco J. Cazorla, Carles Hernández, Jaume Abella

IEEE Des. Test, 2019

Probabilistic Worst-Case Timing Analysis: Taxonomy and Comprehensive Survey.

Francisco J. Cazorla, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernández, Jaume Abella, Tullio Vardanega

ACM Comput. Surv., 2019

ePAPI: Performance Application Programming Interface for Embedded Platforms.

Jeremy Giesen, Enrico Mezzetti, Jaume Abella, Enrique Fernández, Francisco J. Cazorla

Proceedings of the 19th International Workshop on Worst-Case Execution Time Analysis, 2019

Performance Analysis and Optimization of Automotive GPUs.

Fabio Mazzocchetti, Pedro Benedicte, Hamid Tabani, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla

Proceedings of the 31st International Symposium on Computer Architecture and High Performance Computing, 2019

On assessing the viability of probabilistic scheduling with dependent tasks.

Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla

Proceedings of the 34th ACM/SIGAPP Symposium on Applied Computing, 2019

Accurate ILP-Based Contention Modeling on Statically Scheduled Multicore Systems.

Xavier Palomo, Enrico Mezzetti, Jaume Abella, Reinder J. Bril, Francisco J. Cazorla

Proceedings of the 25th IEEE Real-Time and Embedded Technology and Applications Symposium, 2019

STT-MRAM for real-time embedded systems: performance and WCET implications.

Kazi Asifuzzaman, Mikel Fernández, Petar Radojkovic, Jaume Abella, Francisco J. Cazorla

Proceedings of the International Symposium on Memory Systems, 2019

Software-only Diverse Redundancy on GPUs for Autonomous Driving Platforms.

Sergi Alcaide, Leonidas Kosmidis, Carles Hernández, Jaume Abella

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

Software Timing Analysis for Complex Hardware with Survivability and Risk Analysis.

Sergi Vilardell, Isabel Serra, Jaume Abella, Joan del Castillo, Francisco J. Cazorla

Proceedings of the 37th IEEE International Conference on Computer Design, 2019

Generating and Exploiting Deep Learning Variants to Increase Heterogeneous Resource Utilization in the NVIDIA Xavier.

Roger Pujol, Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the 31st Euromicro Conference on Real-Time Systems, 2019

Modeling the Impact of Process Variations in Worst-Case Energy Consumption Estimation.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

An Approach for Detecting Power Peaks During Testing and Breaking Systematic Pathological Behavior.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

GPU4S: Embedded GPUs in Space.

Leonidas Kosmidis, Jérôme Lachaize, Jaume Abella, Olivier Notebaert, Francisco J. Cazorla, David Steenari

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

AURIX TC277 Multicore Contention Model Integration for Automotive Applications.

Enrico Mezzetti, Luca Barbina, Jaume Abella, Stefania Botta, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Multicore Early Design Stage Guaranteed Performance Estimates for the Space Domain.

Mikel Fernández, Gabriel Fernandez, Jaume Abella, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Maximum-Contention Control Unit (MCCU): Resource Access Count and Contention Time Enforcement.

Jordi Cardona, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

LAEC: Look-Ahead Error Correction Codes in Embedded Processors L1 Data Cache.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

High-Integrity GPU Designs for Critical Real-Time Automotive Systems.

Sergi Alcaide, Leonidas Kosmidis, Carles Hernández, Jaume Abella

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Assessing the Adherence of an Industrial Autonomous Driving Framework to ISO 26262 Software Guidelines.

Hamid Tabani, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla, Guillem Bernat

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Towards limiting the impact of timing anomalies in complex real-time processors.

Pedro Benedicte, Jaume Abella, Carles Hernández, Enrico Mezzetti, Francisco J. Cazorla

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018

Fitting Software Execution-Time Exceedance into a Residual Random Fault in ISO-26262.

Irune Agirre, Francisco J. Cazorla, Jaume Abella, Carles Hernández, Enrico Mezzetti, Mikel Azkarate-askatsua, Tullio Vardanega

IEEE Trans. Reliab., 2018

EOmesh: Combined Flow Balancing and Deterministic Routing for Reduced WCET Estimates in Embedded Real-Time Systems.

Jordi Cardona, Carles Hernández, Jaume Abella, Francisco J. Cazorla

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

High-Integrity Performance Monitoring Units in Automotive Chips for Reliable Timing V&V.

Enrico Mezzetti, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla

IEEE Micro, 2018

Safety-Related Challenges and Opportunities for GPUs in the Automotive Domain.

Sergi Alcaide, Leonidas Kosmidis, Hamid Tabani, Carles Hernández, Jaume Abella, Francisco J. Cazorla

IEEE Micro, 2018

Reconciling Time Predictability and Performance in Future Computing Systems.

Francisco J. Cazorla, Jaume Abella, Enrico Mezzetti, Carles Hernández, Tullio Vardanega, Guillem Bernat

IEEE Des. Test, 2018

Assessing Time Predictability Features of ARM Big. LITTLE Multicores.

Gabriel Fernandez, Francisco J. Cazorla, Jaume Abella, Sylvain Girbal

Proceedings of the 30th International Symposium on Computer Architecture and High Performance Computing, 2018

RPR: a random replacement policy with limited pathological replacements.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 33rd Annual ACM Symposium on Applied Computing, 2018

NoCo: ILP-Based Worst-Case Contention Estimation for Mesh Real-Time Manycores.

Jordi Cardona, Carles Hernández, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2018 IEEE Real-Time Systems Symposium, 2018

HWP: Hardware Support to Reconcile Cache Energy, Complexity, Performance and WCET Estimates in Multicore Real-Time Systems.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 30th Euromicro Conference on Real-Time Systems, 2018

A Reliable Statistical Analysis of the Best-Fit Distribution for High Execution Times.

Xavier Civit, Joan del Castillo, Jaume Abella

Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

Design and integration of hierarchical-placement multi-level caches for real-time systems.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Cache side-channel attacks and time-predictability in high-performance critical real-time systems.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 55th Annual Design Automation Conference, 2018

Measurement-based cache representativeness on multipath programs.

Suzana Milutinovic, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla

Proceedings of the 55th Annual Design Automation Conference, 2018

Modelling multicore contention on the AURIX^<i>TM</i> TC27x.

Enrique Díaz, Enrico Mezzetti, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

Measurement-Based Worst-Case Execution Time Estimation Using the Coefficient of Variation.

Jaume Abella, Maria Padilla, Joan del Castillo, Francisco J. Cazorla

ACM Trans. Design Autom. Electr. Syst., 2017

Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration.

Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla

IEEE Trans. Computers, 2017

Adapting TDMA arbitration for measurement-based probabilistic timing analysis.

Milos Panic, Jaume Abella, Eduardo Quiñones, Carles Hernández, Theo Ungerer, Francisco J. Cazorla

Microprocess. Microsystems, 2017

Execution time distributions in embedded safety-critical systems using extreme value theory.

Joan del Castillo, Maria Padilla, Jaume Abella, Francisco J. Cazorla

Int. J. Data Anal. Tech. Strateg., 2017

On the assessment of probabilistic WCET estimates reliability for arbitrary programs.

Suzana Milutinovic, Jaume Abella, Francisco J. Cazorla

EURASIP J. Embed. Syst., 2017

Modelling bus contention during system early design stages.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 12th IEEE International Symposium on Industrial Embedded Systems, 2017

On uses of extreme value theory fit for industrial-quality WCET analysis.

Suzana Milutinovic, Enrico Mezzetti, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 12th IEEE International Symposium on Industrial Embedded Systems, 2017

On the tailoring of CAST-32A certification guidance to real COTS multicore architectures.

Irune Agirre, Jaume Abella, Mikel Azkarate-askasua, Francisco J. Cazorla

Proceedings of the 12th IEEE International Symposium on Industrial Embedded Systems, 2017

SEDEA: A Sensible Approach to Account DRAM Energy in Multicore Systems.

Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero

Proceedings of the 29th International Symposium on Computer Architecture and High Performance Computing, 2017

Work-in-Progress Paper: An Analysis of the Impact of Dependencies on Probabilistic Timing Analysis and Task Scheduling.

Enrico Mezzetti, Jaume Abella, Carles Hernández, Francisco J. Cazorla

Proceedings of the 2017 IEEE Real-Time Systems Symposium, 2017

EPC Enacted: Integration in an Industrial Toolbox and Use against a Railway Application.

Enrico Mezzetti, Mikel Fernández, Alen Bardizbanyan, Irune Agirre, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 2017 IEEE Real-Time and Embedded Technology and Applications Symposium, 2017

Design and Implementation of a Time Predictable Processor: Evaluation With a Space Case Study.

Carles Hernández, Jaume Abella, Francisco J. Cazorla, Alen Bardizbanyan, Jan Andersson, Fabrice Cros, Franck Wartel

Proceedings of the 29th Euromicro Conference on Real-Time Systems, 2017

Boosting Guaranteed Performance in Wormhole NoCs with Probabilistic Timing Analysis.

Mladen Slijepcevic, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Euromicro Conference on Digital System Design, 2017

Design and implementation of a fair credit-based bandwidth sharing scheme for buses.

Mladen Slijepcevic, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Probabilistic timing analysis on time-randomized platforms for the space domain.

Mikel Fernández, David Morales, Leonidas Kosmidis, Alen Bardizbanyan, Ian Broster, Carles Hernández, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla, Paulo Machado, Luca Fossati

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Dynamic software randomisation: Lessons learnec from an aerospace case study.

Fabrice Cros, Leonidas Kosmidis, Franck Wartel, David Morales, Jaume Abella, Ian Broster, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

DIMP: A Low-Cost Diversity Metric Based on Circuit Path Analysis.

Sergi Alcaide, Carles Hernández, Antoni Roca, Jaume Abella

Proceedings of the 54th Annual Design Automation Conference, 2017

Software Time Reliability in the Presence of Cache Memories.

Suzana Milutinovic, Jaume Abella, Irune Agirre, Mikel Azkarate-askasua, Enrico Mezzetti, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the Reliable Software Technologies - Ada-Europe 2017, 2017

MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding.

Enrique Díaz, Mikel Fernández, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Reliable Software Technologies - Ada-Europe 2017, 2017

2016

DReAM: An Approach to Estimate per-Task DRAM Energy in Multicore Systems.

Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero

ACM Trans. Design Autom. Electr. Syst., 2016

Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore.

Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jörg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel G. Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduardo Quiñones, Milos Panic, Jaume Abella, Carles Hernández, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka

ACM Trans. Embed. Comput. Syst., 2016

Sensible Energy Accounting with Abstract Metering for Multicore Systems.

Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Daniel A. Jiménez, Mateo Valero

ACM Trans. Archit. Code Optim., 2016

Fitting processor architectures for measurement-based probabilistic timing analysis.

Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Carles Hernández, Andrea Gianarro, Ian Broster, Francisco J. Cazorla

Microprocess. Microsystems, 2016

Measurement-Based Timing Analysis of the AURIX Caches.

Leonidas Kosmidis, Davide Compagnin, David Morales, Enrico Mezzetti, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016

Mitigating Software-Instrumentation Cache Effects in Measurement-Based Timing Analysis.

Enrique Díaz, Jaume Abella, Enrico Mezzetti, Irune Agirre, Mikel Azkarate-askasua, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016

Data Bus Slicing for Contention-Free Multicore Real-Time Memory Systems.

Javier Jalle, Eduardo Quiñones, Jaume Abella, Luca Fossati, Marco Zulianello, Francisco J. Cazorla

Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016

Contention-aware performance monitoring counte support for real-time MPSoCs.

Javier Jalle, Mikel Fernández, Jaume Abella, Jan Andersson, Mathieu Patte, Luca Fossati, Marco Zulianello, Francisco J. Cazorla

Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016

Modelling the confidence of timing analysis for time randomised caches.

Pedro Benedicte, Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla

Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016

Improving Early Design Stage Timing Modeling in Multicore Based Real-Time Systems.

David Trilla, Javier Jalle, Mikel Fernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2016

Modeling High-Performance Wormhole NoCs for Critical Real-Time Embedded Systems.

Milos Panic, Carles Hernández, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2016

Modelling Probabilistic Cache Representativeness in the Presence of Arbitrary Access Patterns.

Suzana Milutinovic, Jaume Abella, Francisco J. Cazorla

Proceedings of the 19th IEEE International Symposium on Real-Time Distributed Computing, 2016

Resilient random modulo cache memories for probabilistically-analyzable real-time systems.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

Modeling RTL fault models behavior to increase the confidence on TSIM-based fault injection.

Jaime Espinosa, Carles Hernández, Jaume Abella

Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

A confidence assessment of WCET estimates for software time randomized caches.

Pedro Benedicte, Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla

Proceedings of the 14th IEEE International Conference on Industrial Informatics, 2016

TASA: toolchain-agnostic static software randomisation for critical real-time systems.

Leonidas Kosmidis, Roberto Vargas, David Morales, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

pTNoC: Probabilistically Time-Analyzable Tree-Based NoC for Mixed-Criticality Systems.

Mladen Slijepcevic, Mikel Fernández, Carles Hernández, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis.

Francisco J. Cazorla, Jaume Abella, Jan Andersson, Tullio Vardanega, Francis Vatrinet, Iain Bate, Ian Broster, Mikel Azkarate-askasua, Franck Wartel, Liliana Cucu, Fabrice Cros, Glenn Farrall, Adriana Gogonel, Andrea Gianarro, Benoit Triquet, Carles Hernández, Code Lo, Cristian Maxim, David Morales, Eduardo Quiñones, Enrico Mezzetti, Leonidas Kosmidis, Irune Agirre, Mikel Fernández, Mladen Slijepcevic, Philippa Conmy, Walid Talaboulma

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

A detailed methodology to compute Soft Error Rates in advanced technologies.

Marc Riera, Ramon Canal, Jaume Abella, Antonio González

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Improving performance guarantees in wormhole mesh NoC designs.

Milos Panic, Carles Hernández, Jaume Abella, Antoni Roca, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Supertask: Maximizing runnable-level parallelism in AUTOSAR applications.

Sebastian Kehr, Milos Panic, Eduardo Quiñones, Bert Böddeker, Jorge Becerril Sandoval, Jaume Abella, Francisco J. Cazorla, Günter Schäfer

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Random modulo: a new processor cache design for real-time critical systems.

Carles Hernández, Jaume Abella, Andrea Gianarro, Jan Andersson, Francisco J. Cazorla

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

Timely Error Detection for Effective Recovery in Light-Lockstep Automotive Systems.

Carles Hernández, Jaume Abella

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Randomized Caches Can Be Pretty Useful to Hard Real-Time Systems.

Enrico Mezzetti, Marco Ziccardi, Tullio Vardanega, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Leibniz Trans. Embed. Syst., 2015

WCET analysis methods: Pitfalls and challenges on their trustworthiness.

Jaume Abella, Carles Hernández, Eduardo Quiñones, Francisco J. Cazorla, Philippa Ryan Conmy, Mikel Azkarate-askasua, Jon Pérez, Enrico Mezzetti, Tullio Vardanega

Proceedings of the 10th IEEE International Symposium on Industrial Embedded Systems, 2015

Introduction to partial time composability for COTS multicores.

Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Luca Fossati, Marco Zulianello, Francisco J. Cazorla

Proceedings of the 30th Annual ACM Symposium on Applied Computing, 2015

EPC: Extended Path Coverage for Measurement-Based Probabilistic Timing Analysis.

Marco Ziccardi, Enrico Mezzetti, Tullio Vardanega, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2015 IEEE Real-Time Systems Symposium, 2015

Seeking Time-Composable Partitions of Tasks for COTS Multicore Processors.

Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the IEEE 18th International Symposium on Real-Time Distributed Computing, 2015

Characterizing fault propagation in safety-critical processor designs.

Jaime Espinosa, Carles Hernández, Jaume Abella

Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

CAP: Communication-Aware Allocation Algorithm for Real-Time Parallel Applications on Many-Cores.

Milos Panic, Eduardo Quiñones, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Enabling TDMA Arbitration in the Context of MBPTA.

Milos Panic, Jaume Abella, Carles Hernández, Eduardo Quiñones, Theo Ungerer, Francisco J. Cazorla

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

IEC-61508 SIL 3 Compliant Pseudo-Random Number Generators for Probabilistic Timing Analysis.

Irune Agirre, Mikel Azkarate-askasua, Carles Hernández, Jaume Abella, Jon Pérez, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Timing analysis of an avionics case study on complex hardware/software platforms.

Franck Wartel, Leonidas Kosmidis, Adriana Gogonel, Andrea Baldovin, Zoë R. Stephenson, Benoit Triquet, Eduardo Quiñones, Code Lo, Enrico Mezzetti, Ian Broster, Jaume Abella, Liliana Cucu-Grosjean, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Low-cost checkpointing in automotive safety-relevant systems.

Carles Hernández, Jaume Abella

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

PACO: fast average-performance estimation for time-randomized caches.

Suzana Milutinovic, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla

Proceedings of the 52nd Annual Design Automation Conference, 2015

Resource usage templates and signatures for COTS multicore processors.

Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 52nd Annual Design Automation Conference, 2015

Increasing confidence on measurement-based contention bounds for real-time round-robin buses.

Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 52nd Annual Design Automation Conference, 2015

Analysis and RTL correlation of instruction set simulators for automotive microcontroller robustness verification.

Jaime Espinosa, Carles Hernández, Jaume Abella, David de Andrés, Juan-Carlos Ruiz-Garcia

Proceedings of the 52nd Annual Design Automation Conference, 2015

Speeding up Static Probabilistic Timing Analysis.

Suzana Milutinovic, Jaume Abella, Damien Hardy, Eduardo Quiñones, Isabelle Puaut, Francisco J. Cazorla

Proceedings of the Architecture of Computing Systems - ARCS 2015, 2015

2014

Analyzing the Efficiency of L1 Caches for Reliable Hybrid-Voltage Operation Using EDC Codes.

Bojan Maric, Jaume Abella, Mateo Valero

IEEE Trans. Very Large Scale Integr. Syst., 2014

Hybrid Cache Designs for Reliable Hybrid High and Ultra-Low Voltage Operation.

Bojan Maric, Jaume Abella, Francisco J. Cazorla, Mateo Valero

ACM Trans. Design Autom. Electr. Syst., 2014

Efficient Cache Designs for Probabilistically Analysable Real-Time Systems.

Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

IEEE Trans. Computers, 2014

Timing Verification of Fault-Tolerant Chips for Safety-Critical Applications in Harsh Environments.

Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

IEEE Micro, 2014

Per-task Energy Accounting in Computing Systems.

Qixiao Liu, Víctor Jiménez, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero

IEEE Comput. Archit. Lett., 2014

Contention in Multicore Hardware Shared Resources: Understanding of the State of the Art.

Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Christine Rochange, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 14th International Workshop on Worst-Case Execution Time Analysis, 2014

A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation of a Space Case Study.

Javier Jalle, Eduardo Quiñones, Jaume Abella, Luca Fossati, Marco Zulianello, Francisco J. Cazorla

Proceedings of the IEEE 35th IEEE Real-Time Systems Symposium, 2014

AHRB: A high-performance time-composable AMBA AHB bus.

Javier Jalle, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla

Proceedings of the 20th IEEE Real-Time and Embedded Technology and Applications Symposium, 2014

DReAM: Per-Task DRAM Energy Metering in Multicore Systems.

Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero

Proceedings of the Euro-Par 2014 Parallel Processing, 2014

Parallel many-core avionics systems.

Milos Panic, Eduardo Quiñones, Pavel G. Zaykov, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2014 International Conference on Embedded Software, 2014

PUB: Path Upper-Bounding for Measurement-Based Probabilistic Timing Analysis.

Leonidas Kosmidis, Jaume Abella, Franck Wartel, Eduardo Quiñones, Antoine Colin, Francisco J. Cazorla

Proceedings of the 26th Euromicro Conference on Real-Time Systems, 2014

Heart of Gold: Making the Improbable Happen to Increase Confidence in MBPTA.

Jaume Abella, Eduardo Quiñones, Franck Wartel, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 26th Euromicro Conference on Real-Time Systems, 2014

On the Comparison of Deterministic and Probabilistic WCET Estimation Techniques.

Jaume Abella, Damien Hardy, Isabelle Puaut, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 26th Euromicro Conference on Real-Time Systems, 2014

Measurement-Based Probabilistic Timing Analysis and Its Impact on Processor Architecture.

Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Ian Broster, Francisco J. Cazorla

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

Bus designs for time-probabilistic multicore processors.

Javier Jalle, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Time-Analysable Non-Partitioned Shared Caches for Real-Time Multicore Systems.

Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Containing Timing-Related Certification Cost in Automotive Systems Deploying Complex Hardware.

Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Glenn Farrall, Franck Wartel, Francisco J. Cazorla

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

LiVe: Timely Error Detection in Light-Lockstep Safety Critical Systems.

Carles Hernández, Jaume Abella

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

RunPar: An allocation algorithm for automotive applications exploiting runnable parallelism in multicores.

Milos Panic, Sebastian Kehr, Eduardo Quiñones, Bert Böddeker, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014

2013

PROARTIS: Probabilistically Analyzable Real-Time Systems.

Francisco J. Cazorla, Eduardo Quiñones, Tullio Vardanega, Liliana Cucu, Benoit Triquet, Guillem Bernat, Emery D. Berger, Jaume Abella, Franck Wartel, Michael Houston, Luca Santinelli, Leonidas Kosmidis, Code Lo, Dorin Maxim

ACM Trans. Embed. Comput. Syst., 2013

Hardware support for accurate per-task energy metering in multicore systems.

Qixiao Liu, Miquel Moretó, Víctor Jiménez, Jaume Abella, Francisco J. Cazorla, Mateo Valero

ACM Trans. Archit. Code Optim., 2013

Applying Measurement-Based Probabilistic Timing Analysis to Buffer Resources.

Leonidas Kosmidis, Tullio Vardanega, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 13th International Workshop on Worst-Case Execution Time Analysis, 2013

Upper-bounding Program Execution Time with Extreme Value Theory.

Francisco J. Cazorla, Tullio Vardanega, Eduardo Quiñones, Jaume Abella

Proceedings of the 13th International Workshop on Worst-Case Execution Time Analysis, 2013

Measurement-based probabilistic timing analysis: Lessons from an integrated-modular avionics case study.

Franck Wartel, Leonidas Kosmidis, Code Lo, Benoit Triquet, Eduardo Quiñones, Jaume Abella, Adriana Gogonel, Andrea Baldovin, Enrico Mezzetti, Liliana Cucu, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013

Deconstructing bus access control policies for Real-Time multicores.

Javier Jalle, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla

Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013

Multi-level Unified Caches for Probabilistically Time Analysable Real-Time Systems.

Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the IEEE 34th Real-Time Systems Symposium, 2013

On-chip ring network designs for hard-real time systems.

Milos Panic, Germán Rodríguez, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla

Proceedings of the 21st International Conference on Real-Time Networks and Systems, 2013

Implicit-storing and redundant-encoding-of-attribute information in error-correction-codes.

Yiannakis Sazeides, Emre Özer, Danny Kershaw, Panagiota Nikolaou, Marios Kleanthous, Jaume Abella

Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013

Achieving timing composability with measurement-based probabilistic timing analysis.

Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 16th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2013

Supporting industrial use of probabilistic timing analysis with explicit argumentation.

Zoë R. Stephenson, Jaume Abella, Tullio Vardanega

Proceedings of the 11th IEEE International Conference on Industrial Informatics, 2013

DTM: Degraded Test Mode for Fault-Aware Probabilistic Timing Analysis.

Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 25th Euromicro Conference on Real-Time Systems, 2013

parMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications Supporting Analysability.

Theo Ungerer, Christian Bradatsch, Mike Gerdes, Florian Kluge, Ralf Jahr, Jörg Mische, João Fernandes, Pavel G. Zaykov, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Ian Broster, Nick Lay, David George, Eduardo Quiñones, Milos Panic, Jaume Abella, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

Efficient cache architectures for reliable hybrid voltage operation using EDC codes.

Bojan Maric, Jaume Abella, Mateo Valero

Proceedings of the Design, Automation and Test in Europe, 2013

Probabilistic timing analysis on conventional cache designs.

Leonidas Kosmidis, Charlie Curtsinger, Eduardo Quiñones, Jaume Abella, Emery D. Berger, Francisco J. Cazorla

Proceedings of the Design, Automation and Test in Europe, 2013

A cache design for probabilistically analysable real-time systems.

Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the Design, Automation and Test in Europe, 2013

APPLE: adaptive performance-predictable low-energy caches for reliable hybrid voltage operation.

Bojan Maric, Jaume Abella, Mateo Valero

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

On the convergence of mainstream and mission-critical markets.

Sylvain Girbal, Miquel Moretó, Arnaud Grasset, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Sami Yehia

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012

ADAM: an efficient data management mechanism for hybrid high and ultra-low voltage operation caches.

Bojan Maric, Jaume Abella, Mateo Valero

Proceedings of the Great Lakes Symposium on VLSI 2012, 2012

Measurement-Based Probabilistic Timing Analysis for Multi-path Programs.

Liliana Cucu-Grosjean, Luca Santinelli, Michael Houston, Code Lo, Tullio Vardanega, Leonidas Kosmidis, Jaume Abella, Enrico Mezzetti, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 24th Euromicro Conference on Real-Time Systems, 2012

2011

Compiler Directed Issue Queue Energy Reduction.

Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González

Trans. High Perform. Embed. Archit. Compil., 2011

Implementing End-to-End Register Data-Flow Continuous Self-Test.

Javier Carretero, Pedro Chaparro, Xavier Vera, Jaume Abella, Antonio González

IEEE Trans. Computers, 2011

Exploiting intra-task slack time of load operations for DVFS in hard real-time multi-core systems.

Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla, Mateo Valero

SIGBED Rev., 2011

Design of complex circuits using the Via-Configurable transistor array regular layout fabric.

Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González

Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

RVC-based time-predictable faulty caches for safety-critical systems.

Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Mateo Valero, Yanos Sazeides

Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

Towards improved survivability in safety-critical systems.

Jaume Abella, Francisco J. Cazorla, Eduardo Quiñones, Arnaud Grasset, Sami Yehia, Philippe Bonnot, Dimitris Gizopoulos, Riccardo Mariani, Guillem Bernat

Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

Hardware/software-based diagnosis of load-store queues using expandable activity logs.

Javier Carretero, Xavier Vera, Jaume Abella, Tanausú Ramírez, Matteo Monchiero, Antonio González

Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

RVC: a mechanism for time-analyzable real-time processors with faulty caches.

Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Yanos Sazeides, Mateo Valero

Proceedings of the High Performance Embedded Architectures and Compilers, 2011

Control-Flow Recovery Validation Using Microarchitectural Invariants.

Javier Carretero, Jaume Abella, Xavier Vera, Pedro Chaparro

Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

Hybrid high-performance low-power and ultra-low energy reliable caches.

Bojan Maric, Jaume Abella, Francisco J. Cazorla, Mateo Valero

Proceedings of the 8th Conference on Computing Frontiers, 2011

2010

Microarchitectural Online Testing for Failure Detection in Memory Order Buffers.

Javier Carretero, Xavier Vera, Pedro Chaparro, Jaume Abella

IEEE Trans. Computers, 2010

Electromigration for microarchitects.

Jaume Abella, Xavier Vera

ACM Comput. Surv., 2010

VCTA: A Via-Configurable Transistor Array regular fabric.

Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González

Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

High-Performance low-vcc in-order core.

Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González

Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010

The split register file.

Jaume Abella, Javier Carretero, Pedro Chaparro, Xavier Vera

Proceedings of the Design, Automation and Test in Europe, 2010

2009

Selective replication: A lightweight technique for soft errors.

Xavier Vera, Jaume Abella, Javier Carretero, Antonio González

ACM Trans. Comput. Syst., 2009

Energy-efficient register caching with compiler assistance.

Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin

ACM Trans. Archit. Code Optim., 2009

Exploring the limits of early register release: Exploiting compiler analysis.

Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin

ACM Trans. Archit. Code Optim., 2009

Low Vccmin fault-tolerant cache with highly predictable performance.

Jaume Abella, Javier Carretero, Pedro Chaparro, Xavier Vera, Antonio González

Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

End-to-end register data-flow continuous self-test.

Javier Carretero, Pedro Chaparro, Xavier Vera, Jaume Abella, Antonio González

Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009

Online error detection and correction of erratic bits in register files.

Xavier Vera, Jaume Abella, Javier Carretero, Pedro Chaparro, Antonio González

Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

2008

Refueling: Preventing Wire Degradation due to Electromigration.

Jaume Abella, Xavier Vera, Osman S. Unsal, Oguz Ergin, Antonio González, James W. Tschanz

IEEE Micro, 2008

On-line Failure Detection in Memory Order Buffers.

Javier Carretero, Xavier Vera, Pedro Chaparro, Jaume Abella

Proceedings of the 2008 IEEE International Test Conference, 2008

On-Line Failure Detection and Confinement in Caches.

Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González

Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

Issue system protection mechanisms.

Pedro Chaparro, Jaume Abella, Javier Carretero, Xavier Vera

Proceedings of the 26th International Conference on Computer Design, 2008

2007

Penelope: The NBTI-Aware Processor.

Jaume Abella, Xavier Vera, Antonio González

Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007

Surviving to Errors in Multi-Core Environments.

Xavier Vera, Jaume Abella

Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

Fuse: A Technique to Anticipate Failures due to Degradation in ALUs.

Jaume Abella, Xavier Vera, Osman S. Unsal, Oguz Ergin, Antonio González

Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

2006

SAMIE-LSQ: set-associative multiple-instruction entry load/store queue.

Jaume Abella, Antonio González

Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Heterogeneous way-size cache.

Jaume Abella, Antonio González

Proceedings of the 20th Annual International Conference on Supercomputing, 2006

2005

An accurate cost model for guiding data locality transformations.

Xavier Vera, Jaume Abella, Josep Llosa, Antonio González

ACM Trans. Program. Lang. Syst., 2005

IATAC: a smart predictor to turn-off L2 cache lines.

Jaume Abella, Antonio González, Xavier Vera, Michael F. P. O'Boyle

ACM Trans. Archit. Code Optim., 2005

Inherently Workload-Balanced Clustered Microarchitecture.

Jaume Abella, Antonio González

Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

Software Directed Issue Queue Power Reduction.

Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González

Proceedings of the 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 2005

Compiler Directed Early Register Release.

Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin

Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 2005

Variable-Based Multi-module Data Caches for Clustered VLIW Processors.

Enric Gibert, Jaume Abella, F. Jesús Sánchez, Xavier Vera, Antonio González

Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 2005

2004

Low-Complexity Distributed Issue Queue.

Jaume Abella, Antonio González

Proceedings of the 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 2004

2003

Power- and Complexity-Aware Issue Queue Designs.

Jaume Abella, Ramon Canal, Antonio González

IEEE Micro, 2003

On Reducing Register Pressure and Energy in Multiple-Banked Register Files.

Jaume Abella, Antonio González

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

Power Efficient Data Cache Designs.

Jaume Abella, Antonio González

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

Power-Aware Adaptive Issue Queue and Register File.

Jaume Abella, Antonio González

Proceedings of the High Performance Computing - HiPC 2003, 10th International Conference, 2003

Optimizing Program Locality Through CMEs and GAs.

Xavier Vera, Jaume Abella, Antonio González, Josep Llosa

Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques (PACT 2003), 27 September, 2003

2002

Near-Optimal Loop Tiling by Means of Cache Miss Equations and Genetic Algorithms.

Jaume Abella, Antonio González, Josep Llosa, Xavier Vera

Proceedings of the 31st International Conference on Parallel Processing Workshops (ICPP 2002 Workshops), 2002